Altera cyclone V Technical Reference page 906

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

cv_5v4
2016.10.28
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
onfi_device_features Fields
Bit
15:0
value
onfi_optional_commands
Optional commands supported by the connected ONFI device
Module Instance
nandregs
Offset:
0x390
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
NAND Flash Controller
Send Feedback
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
The values in the field should be interpreted as
follows[list] [*]Bit 0 - Supports 16 bit data bus width.
[*]Bit 1 - Supports multiple LUN operations. [*]Bit 2 -
Supports non-sequential page programming. [*]Bit 3
- Supports interleaved program and erase operations.
[*]Bit 4 - Supports odd to even page copyback. [*]Bit
5 - Supports source synchronous. [*]Bit 6 - Supports
interleaved read operations. [*]Bit 7 - Supports
extended parameter page. [*]Bit 8 - Supports program
page register clear enhancement. [*]Bit 9-15 -
Reserved.[/list]
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields
25
24
23
22
Reserved
9
8
7
6
value
RO 0x0
Description
Base Address
onfi_optional_commands
21
20
19
18
5
4
3
2
Access
Register Address
0xFFB80390
13-85
17
16
1
0
Reset
RO
0x0
Altera Corporation

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents