Fpga Manager; Features Of The Fpga Manager - Altera cyclone V Technical Reference

Hard processor system
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2016.10.28
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The FPGA manager in the hard processor system (HPS) manages and monitors the FPGA portion of the
system on a chip (SoC) device. The FPGA manager can configure the FPGA fabric from the HPS, monitor
the state of the FPGA, and drive or sample signals to or from the FPGA fabric.

Features of the FPGA Manager

The FPGA manager provides the following functionality and features:
• Full configuration and partial reconfiguration of the FPGA portion of the SoC device
• Drives 32 general-purpose output signals to the FPGA fabric
• Receives 32 general-purpose input signals from the FPGA fabric
• Receives two boot handshaking input signals from the FPGA fabric (used when the HPS boots from
the FPGA)
• Monitors the FPGA configuration and power status
• Generates interrupts based on the FPGA status changes
• Can reset the FPGA
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are trademarks of Intel Corporation in the US and/or other countries. Other marks and brands may be claimed as the property of others. Intel warrants
performance of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make
changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of
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