Altera cyclone V Technical Reference page 546

7-98
fn_mod
31 30
15 14
wr_tidemark Fields
Bit
3:0
level
fn_mod
Sets the block issuing capability to multiple or single outstanding transactions.
Module Instance
l3regs
Offset:
0x27108
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
Altera Corporation
29 28 27 26
13 12 11 10
Reserved
Name
Stalls the transaction in the write data FIFO until the
number of occupied slots in the write data FIFO
exceeds the level. Note that the transaction is released
before this level is achieved if the network receives the
WLAST beat or the write FIFO becomes full.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Description
Base Address
0xFF800000
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Reserved
21 20 19 18
5 4 3 2
Access
Register Address
0xFF827108
21 20 19 18
5 4 3 2
System Interconnect
cv_5v4
2016.10.28
17 16
1 0
level
RW 0x4
Reset
RW 0x4
17 16
1 0
wr rd
RW RW 0x0
0x0
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