Altera cyclone V Technical Reference page 930

cv_5v4
2016.10.28
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
err_block_addr2 Fields
Bit
15:0
value
intr_status3
Interrupt status register for bank 3
Module Instance
nandregs
Offset:
0x500
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
page_ pipe_ rst_
xfer_inc cmd_ comp
err
RW 0x0
RW 0x0
0x0
NAND Flash Controller
Send Feedback
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
Holds the block address that resulted in a failure on
program or erase operation.
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
INT_ unsup locke
act _cmd d_blk
RW RW RW RW
0x0 0x0 0x0
Bit Fields
25 24 23 22
Reserved
9 8 7 6
value
RO 0x0
Description
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
pipe_ erase progr load_
cpybc _comp am_ comp
k_ comp
RW RW
cmd_
0x0 RW 0x0
comp
0x0
RW
0x0
intr_status3
21 20 19 18
5 4 3 2
Access
Register Address
0xFFB80500
21 20 19 18
5 4 3 2
erase progr time_ dma_
_fail am_ out cmd_
fail comp
RW RW
0x0 RW 0x0 RW
0x0 0x0
13-109
17 16
1 0
Reset
RO 0x0
17 16
1 0
Reser ecc_
ved uncor_
err
RW 0x0
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