Altera cyclone V Technical Reference page 254

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

5-60
datastart
enable Fields
Bit
31:0
magic
datastart
Offset into On-chip RAM of the start of the region for CRC validation
Module Instance
sysmgr
Offset:
0xE4
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
Altera Corporation
Name
Controls whether Boot ROM will attempt to boot
from the contents of the On-chip RAM on a warm
reset. When this feature is enabled, the Boot ROM
code will not configure boot IOs, the pin mux, or
clocks. Note that the enable value is a 32-bit magic
value (provided by the enum).
Value
0x0
0xae9efebc Boot ROM code will attempt to boot
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Description
Description
Boot ROM code will not attempt to
boot from On-chip RAM on a warm
reset
from On-chip RAM on a warm reset
Base Address
0xFFD08000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
offset
RW 0x0
Access
Register Address
0xFFD080E4
21
20
19
18
5
4
3
2
cv_5v4
2016.10.28
Reset
RW
0x0
17
16
1
0
System Manager
Send Feedback

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents