Altera cyclone V Technical Reference page 606

Hard processor system
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8-24
periph_id_2
periph_id_1 Fields
Bit
7:0
jep3to0_pn11to8
periph_id_2
Peripheral ID2
Module Instance
hps2fpgaregs
Offset:
0x1FE8
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
periph_id_2 Fields
Bit
7:0
rev_jepcode_jep6to4
periph_id_3
Peripheral ID3
Module Instance
hps2fpgaregs
Offset:
0x1FEC
Access:
RO
Altera Corporation
Name
JEP106[3:0], Part Number [11:8]
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Revision, JEP106 code flag, JEP106[6:4]
Description
Base Address
0xFF500000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
0xFF500000
Access
Register Address
0xFF501FE8
21
20
19
18
5
4
3
2
rev_jepcode_jep6to4
RO 0x6B
Access
Register Address
0xFF501FEC
cv_5v4
2016.10.28
Reset
RO
0xB3
17
16
1
0
Reset
RO
0x6B
HPS-FPGA Bridges
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