Altera cyclone V Technical Reference page 186

cv_5v4
2016.10.28
Bit
8
ncp
7
prd
6
pre
5
prr
4
ccd
3
crc
FPGA Manager
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Name
Used by software to clear an nCONFIG Pin edge
interrupt.
Value
0x0
0x1
Used by software to clear an PR_DONE edge
interrupt.
Value
0x0
0x1
Used by software to clear an PR_ERROR edge
interrupt.
Value
0x0
0x1
Used by software to clear an PR_READY edge
interrupt.
Value
0x0
0x1
Used by software to clear an CVP_CONF_DONE
edge interrupt.
Value
0x0
0x1
Used by software to clear an CRC_ERROR edge
interrupt.
Value
0x0
0x1
Description
Description
No interrupt clear
Clear interrupt
Description
No interrupt clear
Clear interrupt
Description
No interrupt clear
Clear interrupt
Description
No interrupt clear
Clear interrupt
Description
No interrupt clear
Clear interrupt
Description
No interrupt clear
Clear interrupt
4-43
gpio_porta_eoi
Access Reset
WO 0x0
WO 0x0
WO 0x0
WO 0x0
WO 0x0
WO 0x0
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