Altera cyclone V Technical Reference page 969

cv_5v4
2016.10.28
The command path state machine performs the following functions, according to
1.
send_initialization
command.
2.
response_expected
command path state machine receives a 48-bit or 136-bit response and sends it to the BIU. If the start
bit of the card response is not received within the number of clock cycles (as set up in the
register), the
BIU. If the response-expected bit is set to 0, the command path sends out a command and signals a
response done to the BIU, which causes the
3.
response_length
short response is received.
4.
check_response_crc
response with the internally-generated CRC-7. If the two do not match, the response CRC error is
signaled to the BIU, that is, the
Send Response to BIU
If the
response_expected
Response register 0 (
register 2 (
resp2
which the
cmd
by the CIU, the response is written to the
set to 1 in the
The command path verifies the contents of the card response.
Table 14-11: Card Response Fields
Response transmission bit
Command index
End bit
The command index is not checked for a 136-bit response or if the
register is set to 0. For a 136-bit response and reserved CRC 48-bit responses, the command index is
reserved, that is, 0b111111.
Related Information
SD Association
For more information about response values, refer to Physical Layer Simplified Specification, Version 3.01
as described on the SD Association website.
Driving P-bit to the CMD Pin
The command path drives a one-cycle pull-up bit (P-bit) to 1 on the CMD pin between two commands if a
response is not expected. If a response is expected, the P-bit is driven after the response is received and
before the start of the next command. While accessing a CE-ATA card device, for commands that expect a
CCS, the P-bit is driven after the response only if the interrupts are disabled in the CE-ATA card (the
SD/MMC Controller
Send Feedback
—Initialization sequence of 80 clock cycles is sent before sending the
†
—A response is expected for the command. After the command is sent out, the
bit and command done (
rto
—If this bit is set to 1, a 136-bit long response is received; if it is set to 0, a 48-bit
†
—If this bit is set to 1, the command path compares CRC-7 received in the
rcrc
bit is set to 1 in the
) is updated for a short response, and the response register 3 (
resp0
), response register 1 (
bit is set to 1 in the
rintsts
†
register.
rintsts
†
Field
†
) bit are set to 1 in the
CD
bit to be set to 1 in the
cmd
bit is set to 1 in the
rintsts
register, the received response is sent to the BIU.
cmd
), and registers are updated on a long response, after
resp1 resp0
register. If the response is for an AUTO_STOP command sent
register, after which the auto command done bit (
resp1
0
Command index of the sent command
1
Send Response to BIU
register bit values:
cmd
register, to signal to the
rintsts
†
register.
rintsts
†
register.
resp3
Contents
bit in the
check_response_crc
Altera Corporation
14-23
†
tmout
), response
) is
acd
cmd
nIEN