Altera cyclone V Technical Reference page 298

5-104
Pin Mux Control Group Register Descriptions
GPLMUX48
Selection between GPIO and LoanIO output and output enable for GPIO48 and LoanIO48. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX49
Selection between GPIO and LoanIO output and output enable for GPIO49 and LoanIO49. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX50
Selection between GPIO and LoanIO output and output enable for GPIO50 and LoanIO50. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX51
Selection between GPIO and LoanIO output and output enable for GPIO51 and LoanIO51. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX52
Selection between GPIO and LoanIO output and output enable for GPIO52 and LoanIO52. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX53
Selection between GPIO and LoanIO output and output enable for GPIO53 and LoanIO53. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX54
Selection between GPIO and LoanIO output and output enable for GPIO54 and LoanIO54. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX55
Selection between GPIO and LoanIO output and output enable for GPIO55 and LoanIO55. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX56
Selection between GPIO and LoanIO output and output enable for GPIO56 and LoanIO56. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
Altera Corporation
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cv_5v4
2016.10.28
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