Altera cyclone V Technical Reference page 809

cv_5v4
2016.10.28
protruledata Fields
Bit
13
ruleresult
12:3
portmask
2
validrule
1:0
security
protrulerdwr
This register is used to perform read and write operations to the internal protection table.
Module Instance
sdr
Offset:
0x509C
SDRAM Controller Subsystem
Send Feedback
Name
Set this bit to a one to force a protection failure, zero
to allow the access the succeed
The bits in this field determine which ports the rule
applies to. If a port's bit is set, the rule applies to that
port; if the bit is clear, the rule does not apply. The bits
in this field correspond to the control ports as follows:
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
&
Set to bit to a one to make a rule valid, set to a zero to
invalidate a rule.
Valid security field encodings are:
Value
0x0
0x1
0x2 or 0x3 Rule applies to secure and non-secure
0xFFC20000
Description
CPU write
L3 write
CPU read
L3 read
FPGA-to-SDRAM port 5
FPGA-to-SDRAM port 4
FPGA-to-SDRAM port 3
FPGA-to-SDRAM port 2
FPGA-to-SDRAM port 1
FPGA-to-SDRAM port 0
Description
Rule applies to secure transactions
Rule applies to non-secure transactions
transactions
Base Address
0xFFC2509C
11-71
protrulerdwr
Access Reset
RW 0x0
RW 0x0
RW 0x0
RW 0x0
Register Address
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