Mpu Address Map - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
Register Group
PTM0
PTM1

MPU Address Map

This address space is allocated to the MPU. For detailed information about the use of this address space,
click here
to access the ARM documentation for the Cortex-A9 MPCore.
Table 10-17: MPU Module Address Range
Module Instance
MPU
Table 10-18: MPU Module Register Space
Module Instance
SCU
GIC
Global Timer
Reserved
Private Timers
and Watchdog
Timers
CoreSight Debug and Trace
Send Feedback
Description
This addres space is
allocated for Program
Trace Macrocell 0
(PTM0)
This address space is
allocated for Program
Trace Macrocell 1
(PTM1).
Start Address
0xFFFEC000
Description
This address space is
allocated for the Snoop
Control Unit registers.
This address space is
allocated for the
General Interrupt
Controller (GIC)
registers.
This address space is
allocated for the Global
Timer registers.
This address space is
reserved.
This is the address
space is allocated for
private timers and
watchdog timers.
Start Address
0xFF11C000
0xFF11D000
Start Address
0xFFFEC000
0xFFFEC100
0xFFFC200
0xFFFEC300
0xFFFEC600
MPU Address Map
End Address
0xFF11CFFF
0xFF11DFFF
End Address
0xFFFEEFFF
End Address
0xFFFEC0FF
0xFFFEC1FF
0xFFFEC2FF
0xFFFEC5FF
0xFFFEC6FF
Altera Corporation
10-25