Altera cyclone V Technical Reference page 974

14-28
Data Receive
If the
bytcnt
transfer. The data transmit state machine for this type of data transfer continues the block-write data
transfer until the host software issues an SD/SDIO STOP or STOP_TRANSMISSION (CMD12)
command.
Data Receive
The data-receive state machine receives data two clock cycles after the end bit of a data read command,
even if the command path detects a response error or response CRC error. If a response is not received
from the card because a response timeout occurs, the BIU does not receive a signal that the data transfer is
complete. This happens if the command sent by the controller is an illegal operation for the card, which
keeps the card from starting a read data transfer.
If data is not received before the data timeout, the data path signals a data timeout to the BIU and an end
to the data transfer done. Based on the value of the
state machine gets data from the card data bus in a stream or block(s).
Figure 14-9: Data Receive State Machine
Stream Data Read
A stream-read data transfer occurs if the
the data path receives data from the card and writes it to the FIFO buffer. If the FIFO buffer becomes full,
the card clock stops and restarts once the FIFO buffer is no longer full.
An open-ended stream-read data transfer occurs if the
transfer, the data path continuously receives data in a stream until the host software issues an SD/SDIO
STOP command. A stream data transfer terminates two clock cycles after the end bit of the STOP
command.
If the
bytcnt
STOP command is internally generated and loaded into the command path, where the end bit of the
STOP command occurs after the last byte of the stream data transfer is received. This data transfer can
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is zero (the block size must be greater than zero) the transfer is an open-ended block
†
load_new_cmd,
data_expected, Read
Data & Block Transfer
Stop Data Command
Rx
Data Block
Block Done
†
register contains a nonzero value and the
†
transfer_mode
†
Data Rx
Idle
load_new_command,
data_expected, Read
Data & Stream Transfer
Byte Count Byte Count
Remaining != 0 Remaining = 0
or Stop Data Command
Read
Wait
bit in the
transfer_mode
bytcnt
send_auto_stop
bit in the register, the data-receive
cmd
†
Stop Data Command
Rx
Data Stream
register is set to 1, at which time
cmd
†
register is set to 0. During this type of data
bit in the register is set to 1, a
cmd
cv_5v4
2016.10.28
SD/MMC Controller
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