Altera cyclone V Technical Reference page 164

cv_5v4
2016.10.28
gpo Fields
Bit
31:0
value
gpi
Provides a low-latency, low-performance, and simple way to read general-purpose signals driven from the
FPGA fabric.
Module Instance
fpgamgrregs
Offset:
0x14
Access:
RO
31 30
15 14
gpi Fields
Bit
31:0
value
misci
Provides a low-latency, low-performance, and simple way to read specific handshaking signals driven from
the FPGA fabric.
Module Instance
fpgamgrregs
FPGA Manager
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Name
Drives h2f_gp[31:0] with specified value. When read,
returns the current value being driven to the FPGA
fabric.
0xFF706000
29 28 27 26
13 12 11 10
Name
The value being driven from the FPGA fabric on f2h_
gp[31:0]. If the FPGA is not in User Mode, the value
of this field is undefined.
0xFF706000
Description
Base Address
Bit Fields
25 24 23 22
value
RO 0x0
9 8 7 6
value
RO 0x0
Description
Base Address
Access
Register Address
0xFF706014
21 20 19 18
5 4 3 2
Access
Register Address
0xFF706018
4-21
gpi
Reset
RW 0x0
17 16
1 0
Reset
RO 0x0
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