Altera cyclone V Technical Reference page 944

Hard processor system
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cv_5v4
2016.10.28
Module Instance
nandregs
Offset:
0x790
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
no_of_blocks_per_lun Fields
Bit
3:0
value
lun_status_cmd
Indicates the command to be sent while checking status of the next LUN.
Module Instance
nandregs
Offset:
0x7A0
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
NAND Flash Controller
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0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Indicates the first block of next LUN. This informa‐
tion is used for extracting the target LUN during LUN
interleaving. After Initialization, if the controller
detects an ONFi device, this field is automatically
updated by the controller. For other devices, software
will need to write to this register for proper
interleaving. The value in this register is interpreted as
follows- [list][*]0 - Next LUN starts from 1024. [*]1 -
Next LUN starts from 2048. [*]2 - Next LUN starts
from 4096 and so on... [/list]
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Base Address
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
lun_status_cmd
Register Address
0xFFB80790
21
20
19
18
5
4
3
2
RW 0xF
Access
Register Address
0xFFB807A0
13-123
17
16
1
0
value
Reset
RW
0xF
Altera Corporation

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