Functional Description Of The Scan Manager - Altera cyclone V Technical Reference

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cv_5v4
2016.10.28
Communicating with the JTAG TAP Controller
Cyclone V Device Handbook Volume 1: Device Interfaces and Integration
For more information about boundary scan tests, refer to the "JTAG Boundary-Scan Testing in Cyclone
V Devices" chapter.

Functional Description of the Scan Manager

The scan manager serves the following purposes:
• Configuring HPS I/O scan chains
• Communicating with the JTAG TAP controller
Configuring HPS I/O Scan Chains
The HPS I/O pins are configured through a series of scan chains.
I/O pin configuration involves such steps as setting the I/O standard and drive strength for each I/O bank.
After a cold reset, all the I/O scan chains in the HPS must be configured prior to being used to communi‐
cate with external devices.
Software uses the scan manager to write configuration data to the scan chains. Separate I/O configuration
data files for FPGA and HPS are generated by the Quartus
for the FPGA portion of the system-on-a-chip (SoC) device is assembled. The HPS configuration data is
written to the scan manager by software.
Before configuring a specific I/O bank, the corresponding scan chain must be enabled by writing to the
bits in the
en
bit of the
stat
Alternatively, when the FPGA JTAG TAP controller receives the
block enters
the scan manager JTAG-AP and configure the HPS I/O pins. The
configurable I/O pins in the SoC device including the FPGA I/O pins and the HPS I/O pins. The FPGA
and HPS portions of the device must both be powered on to execute the
logic connected to the FPGA JTAG pins sends the
tion data for all FPGA and HPS I/O pins. While
prevent software from potentially interfering with the I/O configuration.
Related Information
stat
on page 6-9
Information about configuring the scan manager's stat register
en
on page 6-11
Information about configuring the scan manager's en register
Scan Manager Address Map and Register Definitions
Cyclone V Device Handbook Volume 1: Device Interfaces and Integration
For more information about boundary scan tests, refer to the "JTAG Boundary-Scan Testing in Cyclone
V Devices" chapter.
System Manager
The HPS I/O pins need to be frozen before configuring them. For more information, refer to the System
Manager chapter.
Scan Manager
Send Feedback
register. The scan manager must not be active during this process. Software reads the active
register to determine the scan manager state.
mode. When the control block is in
CONFIG_IO
on page 5-1
Functional Description of the Scan Manager
on page 6-6
Prime software when the configuration image
®
CONFIG_IO
mode, the controller can override
CONFIG_IO
CONFIG_IO
CONFIG_IO
instruction, which provides I/O configura‐
CONFIG_IO
mode is active, the HPS is held in cold reset to
CONFIG_IO
on page 6-8
6-5
JTAG instruction, the control
instruction configures all
instruction. External
Altera Corporation

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