Sd/Mmc Controller Programming Model - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
Figure 14-12: ACMD41 Argument
a. Bit 30 informs the card if host supports SDHC/SDXC or not; this bit should be set to 1'b1.
b. Bit 28 can be either 1 or 0.
c. Bit 24 should be set to 1'b1, indicating that the host is capable of voltage switching.
Figure 14-13: ACMD41 Response (R3)
d. Bit 30 – If set to 1'b1, card supports SDHC/SDXC; if set to 1'b0, card supports only SDSC.
e. Bit 24 – If set to 1'b1, card supports voltage switching and is ready for the switch.
f. Bit 31 – If set to 1'b1, initialization is over; if set to 1'b0, means initialization in process
4. If the card supports voltage switching, then the software must perform the steps discussed for either the
"Voltage Switch Normal Scenario" or the "Voltage Switch Error Scenario", located in the Synopsys
DesignWare Cores Mobile Storage Host Databook.
Related Information
Synopsys DesignWare Cores Mobile Storage Host Databook
For more information about Voltage Switching

SD/MMC Controller Programming Model

Software and Hardware Restrictions
Only one data transfer command should be issued at one time. For CE-ATA devices, if CE-ATA device
interrupts are enabled (nIEN=0), only one RW_MULTIPLE_BLOCK command (RW_BLK) should be
SD/MMC Controller
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SD/MMC Controller Programming Model
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