Altera cyclone V Technical Reference page 832

cv_5v4
2016.10.28
• A complete page must be read or written using a MAP01 command. During such transfers, every
transaction from the host must have the same block and page address. The NAND flash controller
internally keeps track of how much data it reads or writes.
• MAP00 commands cannot be used in between using MAP01 commands for reading or writing a page.
• DMA must be disabled (the
while the host is performing MAP01 operations directly. If the host issues MAP01 commands to the
NAND flash controller while DMA is enabled, the flash controller discards the request and generates
an
unsup_cmd
MAP10 Commands
MAP10 commands provide an interface to the control plane of the NAND flash controller. MAP10
commands control special functions of the flash device, such as erase, lock, unlock, copy back, and page
spare area access. Data passed in this command pathway targets the NAND flash controller rather than
the flash device. Unlike other command types, the data (input or output) related to these transactions does
not affect the contents of the flash device. Rather, this data specifies and performs the exact commands of
the flash controller. Only the lower 16 bits of the
MAP10 Command Format
Table 13-8: MAP10 Command Format with Address Mapping
The following table shows the format of a MAP10 command. This command is written to the Command
register in the
Address Bits
31:28
27:26
25:24
23:<M>
(<M>-1):0
Note: <M> depends on the number of pages per block in the device, as follows:
• 32 pages per block: <M>=5
• 64 pages per block: <M>=6
• 128 pages per block: <M>=7
• 256 pages per block: <M>=8
• 384 pages per block: <M>=9
• 512 pages per block: <M>=9
NAND Flash Controller
Send Feedback
bit of the
flag
interrupt.
region.
nanddata
Name
(reserved)
CMD_MAP
(reserved)
BLK_ADDR
PAGE_ADDR
register in the
dma_enable
register contain the relevant information.
Data
Description
Set to 0
Set to 2
Set to 0
Block address in the device
Page address in the device
MAP10 Commands
group must be set to 0)
dma
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