Configuring Embedded Cross-Trigger Connections - Altera cyclone V Technical Reference

10-20
FPGA-CTI
Pin Number
2
1
0
Table 10-13: csCTI Trigger Output Acknowledge Signals
The following table lists the trigger output pin acknowledge connections implemented for csCTI.
Pin Number
7
6
5
4
3
2
1
0
FPGA-CTI
FPGA-CTI connects the debug system to the FPGA fabric. FPGA-CTI has all of its triggers available to the
FPGA fabric.
Related Information

Configuring Embedded Cross-Trigger Connections

For more information about the triggers, refer to the "Configuring Embedded Cross-Trigger Connections"
chapter.
Configuring Embedded Cross-Trigger Connections
CTI interfaces are programmable through a memory-mapped register interface.
The specific registers are described in the CoreSight Components Technical Reference Manual, which you
can download from the ARM Infocenter.
To access registers in any CoreSight component through the debugger, the register offsets must be added
to the CoreSight component's base address. That combined value must then be added to the address at
which the ROM table is visible to the debugger (0x80000000).
Altera Corporation
Signal
FLUSHIN
TRIGIN
FLUSHIN
Signal
0
0
0
0
TRIGINACK
FLUSHINACK
0
0
Destination
TPIU
ETR
ETR
Source
—
—
—
—
TPIU
TPIU
—
—
on page 10-20
cv_5v4
2016.10.28
CoreSight Debug and Trace
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