Altera cyclone V Technical Reference page 858

cv_5v4
2016.10.28
Register
onfi_timing_mode
page 13-86
onfi_pgm_cache_timing
_mode on page 13-87
onfi_device_no_of_lun
s on page 13-87
onfi_device_no_of_blo
cks_per_lun_l
13-88
onfi_device_no_of_blo
cks_per_lun_u
13-89
features on page 13-
90
Interrupt and Status Registers
Register
transfer_mode
13-92
intr_status0
13-93
intr_en0 on page 13-
94
page_cnt0 on page 13-
96
err_page_addr0
page 13-97
err_block_addr0
page 13-98
intr_status1
13-98
intr_en1 on page 13-
100
page_cnt1 on page 13-
102
err_page_addr1
page 13-102
NAND Flash Controller
Send Feedback
Offset Width Acces
on 0x3A0
0x3B0
0x3C0
0x3D0
on page
0x3E0
on page
0x3F0
Offset Width Acces
on page 0x400
on page 0x410
0x420
0x430
on 0x440
on 0x450
on page 0x460
0x470
0x480
on 0x490
NAND Flash Controller Module Registers (AXI Slave) Address Map
Reset Value
s
32 RO 0x0
32 RO 0x0
32 RW 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x841
Reset Value
s
32 RO 0x0
32 RW 0x0
32 RW 0x2000
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RW 0x0
32 RW 0x2000
32 RO 0x0
32 RO 0x0
13-37
Description
Description
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