Nand Flash Controller Module Registers (Axi Slave) Address Map - Altera cyclone V Technical Reference

13-34

NAND Flash Controller Module Registers (AXI Slave) Address Map

NAND Flash Controller Module Registers (AXI Slave) Address Map
Registers in the NAND Flash Controller module accessible via its register AXI slave
Base Address:
Configuration registers
Register
device_reset
13-41
transfer_spare_reg
page 13-42
load_wait_cnt
13-43
program_wait_cnt
page 13-44
erase_wait_cnt
page 13-45
int_mon_cyccnt
page 13-46
rb_pin_enabled
page 13-47
multiplane_operation
on page 13-48
multiplane_read_enabl
e on page 13-48
copyback_disable
page 13-49
cache_write_enable
page 13-50
cache_read_enable
page 13-50
prefetch_mode
13-51
chip_enable_dont_care
on page 13-52
ecc_enable on page
13-53
global_int_enable
page 13-53
twhr2_and_we_2_re
page 13-54
Altera Corporation
0xFFB80000
Offset
on page 0x0
on 0x10
on page 0x20
on 0x30
on 0x40
on 0x50
on 0x60
0x70
0x80
on 0x90
on 0xA0
on 0xB0
on page 0xC0
0xD0
0xE0
on 0xF0
on 0x100
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x0
32 RW 0x1F4
32 RW 0x1F4
32 RW 0x1F4
32 RW 0x1F4
32 RW 0x1
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x1
32 RW 0x0
32 RW 0x1
32 RW 0x0
32 RW 0x1432
cv_5v4
2016.10.28
Description
NAND Flash Controller
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