Memory Management Unit - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
Features of the NEON MPE
The NEON processing engine accelerates multimedia and signal processing algorithms such as video
encoding and decoding, 2-D and 3-D graphics, audio and speech processing, image processing, telephony,
and sound synthesis.
The Cortex-A9 NEON MPE performs the following types of operations:
• SIMD and scalar single-precision floating-point computations
• Scalar double-precision floating-point computation
• SIMD and scalar half-precision floating-point conversion
• 8-, 16-, 32-, and 64-bit signed and unsigned integer SIMD computation
• 8-bit or 16-bit polynomial computation for single-bit coefficients
The following operations are available:
• Addition and subtraction
• Multiplication with optional accumulation (MAC)
• Maximum- or minimum-value driven lane selection operations
• Inverse square root approximation
• Comprehensive data-structure load instructions, including register-bank-resident table lookup
Related Information
ARM Infocenter
For more information about the Cortex-A9 NEON MPE, refer to the Cortex-A9 NEON
Processing Engine Technical Reference Manual, which you can download from the ARM Infocenter
website.

Memory Management Unit

The MMU is used in conjunction with the L1 and L2 caches to translate virtual addresses used by software
to physical addresses used by hardware. Each processor has a private MMU.
TLBs Supported By the MMU
TLB Type
Micro TLB
Micro TLB
Main TLB
TLB Features
The main TLB has the following features:
• Lockable entries using the lock-by-entry model
• Supports hardware page table walks to perform look-ups in the L1 data cache
Cortex-A9 Microprocessor Unit Subsystem
Send Feedback
Memory Type
Instruction
Data
Instruction and Data
Features of the NEON MPE
Number of Entries
32
32
128
9-9
Media
™
Associativity
Fully associative
Fully associative
Two-way associative
Altera Corporation