Altera cyclone V Technical Reference page 224

5-30
parityinj
parityinj Fields
Bit
15
btac_1
14
btac_0
13
ghb_1
12
ghb_0
11
ictag_1
10
ictag_0
9
icdata_1
8
icdata_0
7
maintlb_1
6
maintlb_0
5
dcouter_1
4
dcouter_0
3
dctag_1
Altera Corporation
Name
If 1, injecting parity error to BTAC RAM.The field
array index corresponds to the CPU index.
If 1, injecting parity error to BTAC RAM.The field
array index corresponds to the CPU index.
If 1, injecting parity error to GHB RAM.The field
array index corresponds to the CPU index.
If 1, injecting parity error to GHB RAM.The field
array index corresponds to the CPU index.
If 1, injecting parity error to Instruction Cache Tag
RAM.The field array index corresponds to the CPU
index.
If 1, injecting parity error to Instruction Cache Tag
RAM.The field array index corresponds to the CPU
index.
If 1, injecting parity error to Instruction Cache Data
RAM.The field array index corresponds to the CPU
index.
If 1, injecting parity error to Instruction Cache Data
RAM.The field array index corresponds to the CPU
index.
If 1, injecting parity error to Main TLB RAM.The field
array index corresponds to the CPU index.
If 1, injecting parity error to Main TLB RAM.The field
array index corresponds to the CPU index.
If 1, injecting parity error to Data Cache Outer
RAM.The field array index corresponds to the CPU
index.
If 1, injecting parity error to Data Cache Outer
RAM.The field array index corresponds to the CPU
index.
If 1, injecting parity error to Data Cache Tag
RAM.The field array index corresponds to the CPU
index.
Description
cv_5v4
2016.10.28
Access Reset
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
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