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Altera HSMC Reference Manual

Altera HSMC Reference Manual

Data conversion
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101 Innovation Drive
San Jose, CA 95134
www.altera.com
Data Conversion HSMC
Reference Manual
Document Version:
Document Date:
1.1
November 2008

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  • Page 1 Data Conversion HSMC Reference Manual 101 Innovation Drive Document Version: San Jose, CA 95134 Document Date: November 2008 www.altera.com...
  • Page 2 Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation.

  • Page 3: Table Of Contents

    HSMC Connector (J1) ........
  • Page 4 Contents Data Conversion HSMC Reference Manual © November 2008 Altera Corporation Preliminary...

  • Page 5: Chapter 1. Overview

    ® development boards that feature the HSMC connector. The Data Conversion HSMC provides a set of analog to digital (A/D) and digital to analog (D/A) interfaces including an audio coder/decoder (CODEC) interface. This manual describes each of the hardware interfaces on the Data Conversion HSMC.

  • Page 6: Components And Block Diagram

    D/A Converter Channels A and B Output interface ■ ■ Power Supply C Serial EEPROM ■ Block Diagram Figure 1–2 shows the functional block diagram of the Data Conversion HSMC. Figure 1–2. Data Conversion HSMC Block Diagram External Clock Output External Clock Input CLK_A XT_CLK CLK_B CLK_A...

  • Page 7: Chapter 2. Board Components And Interfaces

    HSMC’s major components and interfaces. Board schematics, board layout database, and assembly files for the Data Conversion HSMC are included in the board_design_files subdirectory of the installed kit directory. For information about powering up the Data Conversion HSMC and installing the demo software and examples, refer to the user guide provided with your kit.

  • Page 8: Configuration, Status, And Setup Elements

    Data Conversion HSMC. Figure 2–2. Data Conversion HSMC—Back View HSMC Connector (J1) Table 2–1 lists the components and their corresponding board references. Table 2–1. Data Conversion HSMC Feature Overview (Part 1 of 2) Board Reference Name Description Page...

  • Page 9: A/D Converter Clock Select Jumper (J3, J7)

    Chapter 2: Board Components and Interfaces 2–3 Configuration, Status, and Setup Elements Table 2–1. Data Conversion HSMC Feature Overview (Part 2 of 2) Board Reference Name Description Page J25 (External Clock Out-p) External clock output SMA SMA connectors for a differential clock output 2–7...

  • Page 10: Power Down Select Jumper (J2, J6)

    Notes to Table 2–4: (1) On the schematic, MUX (U11) output signal names are DAC_CLK_1_P and DAC_CLK_1_N. (2) On the schematic, MUX (U12) output signal names are DAC_CLK_2_P and DAC_CLK_2_N. Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...

  • Page 11: Mode Select Jumper (J11)

    Table 2–7. Sleep Select Jumper (J13) Settings for DAC5672 D/A Converter Jumper Settings (J13) Description Jumper ON Puts D/A converter in power down mode Jumper OFF D/A converter in normal state © November 2008 Altera Corporation Data Conversion HSMC Reference Manual...

  • Page 12: External Clock Output Select Jumper (J23)

    External Clock In LTI-SASF54GT 1.00K, 1% XT_CK_IN_P XT_IN_P XT_CK_IN_UNI VTT_XCK 5 4 3 2 Unipolar R111 XT_CK_IN_BI XT_IN_N TT1_8_KK91 R112 Bipolar 0.1µF 1.00K, 1% XT_CK_IN_N 5 4 3 2 LTI-SASF54GT Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...

  • Page 13: External Clock Output Sma Connectors (J25, J28)

    C Serial EEPROM. A/D Converter (U1, U2) The Data Conversion HSMC contains two AD9254 14-bit 150 MS/s A/D converters. This device is designed for high-speed and high-performance applications. The inputs to these A/D converters are transformer-coupled in order to create a balanced input.
  • Page 14 Table 2–11. A/D Converter Channel B (U2) Pin-Out Information (Part 1 of 2) Device HSMC Signal HSMC Pin Device Signal Pin Number Description Data Output Bit 0 ADB_D0 Data Output Bit1 ADB_D1 Data Output Bit 2 ADB_D2 Data Output Bit 3 ADB_D3 Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...

  • Page 15: A/D Converter Clocks

    SMA clock (J26 and J30). The selected A/D clock passes through a differential to LVDS clock multiplexer (U9 for channel A, U10 for channel B), which provides the clock signal to the AD9254. © November 2008 Altera Corporation Data Conversion HSMC Reference Manual...
  • Page 16 Pin Number Device Signal Number Description Non-inverting Differential clock input FPGA_CLK_A_P PCLK0P Inverting Differential clock input FPGA_CLK_A_N PCLK0N Non-inverting Differential clock input FPGA_CLK_B_P PCLK1P Inverting Differential clock input FPGA_CLK_B_N PCLK1N Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...

  • Page 17: A/D Converter Input Sma Connector (J4, J8)

    AD9254 A/D converter input with SMA cables. D/A Converter (U3) The D/A converter (U3 for channels A and B) on the Data Conversion HSMC provides 14-bit resolution and produces samples at rates up to 275 MS/s. It is a high-speed TI DAC5672 D/A converter and is set up to drive a differential-to-single output through a transformer.
  • Page 18 (2) This pin is connected to Differential Receiver pin U4.6. (3) This pin is connected to Jumper pin J10.1. (4) This pin is connected to Jumper pin J11.1. (5) This pin is connected to Jumper pin J13.2. Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...

  • Page 19: D/A Converter Clocks

    FPGA_CLK_A_P PCLK0P FPGA_CLK_A_N FPGA_CLK_A_N PCLK0N FPGA_CLK_B_P FPGA_CLK_B_P PCLK1P FPGA_CLK_B_N FPGA_CLK_B_N PCLK1N XT_IN_P XT_IN_P DAC_CLK_2_P PCLK2P XT_IN_N XT_IN_N DAC_CLK_2_N PCLK2N NO_CLK_P NO_CLK_P PCLK3P NO_CLK_N NO_CLK_N PCLK3N DAB_CLK_S0 SEL0 DAB_CLK_S1 SEL1 ICS854054 © November 2008 Altera Corporation Data Conversion HSMC Reference Manual...

  • Page 20: D/A Converter Output Sma Connector (J12, J14)

    DAC5672 D/A converter output with SMA cables. Audio CODEC Converter (U5) The Data Conversion HSMC contains three stereo jack and one mic jack connectors which provide one stereo output, one stereo input, one amplified stereo headphone output, and one microphone input. The stereo jacks are driven by a stereo audio CODEC running at 8 to 96 kHz.

  • Page 21: Audio Jacks (J19, J20, J21, J42)

    Samtec connector is modified by removing every third pin in bank 1. CMOS utilization of the HSMC pins is assumed and no options for supporting other differential signaling are provided with the board. The eight clock-data-recovery high-speed transceiver channels are not connected on this HSMC.

  • Page 22: I 2 C Serial Eeprom (U14)

    .626 REF DP Bank .036 REF .006 REF C Serial EEPROM (U14) There is a 2-Kbit I C Serial EEPROM on the Data Conversion HSMC. Table 2–19 lists the I C Serial EEPROM board reference and manufacturing information. Table 2–19. I...

  • Page 23: Power Supply

    A/D Power Supplies (U6, U7, U8) The power supply block distributes clean power from the 12-V and 3.3-V input supply (from the host board through the HSMC connector) to the Data Conversion HSMC through on-board regulators. To provide various voltage options, the board uses several Linear Technologies regulators.
  • Page 24 2–18 Chapter 2: Board Components and Interfaces Power Supply Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...
  • Page 25 A. Pin-Out Information for the Cyclone III (3C120) Development Board Table A–1 provides the HSMC Port A interface pin-out information for the Cyclone III EP3C120F780 development board. Table A–1. HSMC Port A Interface Pin-Out Information (Part 1 of 4) Data Conversion HSMC Schematic...
  • Page 26 A–2 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board Table A–1. HSMC Port A Interface Pin-Out Information (Part 2 of 4) Data Conversion HSMC Schematic Development Board Schematic Cyclone Board Reference Schematic Schematic (J1) Description Signal Name...
  • Page 27 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board A–3 Table A–1. HSMC Port A Interface Pin-Out Information (Part 3 of 4) Data Conversion HSMC Schematic Development Board Schematic Cyclone Board Reference Schematic Schematic (J1) Description Signal Name...
  • Page 28 A–4 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board Table A–1. HSMC Port A Interface Pin-Out Information (Part 4 of 4) Data Conversion HSMC Schematic Development Board Schematic Cyclone Board Reference Schematic Schematic (J1) Description Signal Name...
  • Page 29 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board A–5 Table A–2 provides the HSMC Port B interface pin-out information for the Cyclone III EP3C120F780 development board. Table A–2. HSMC Port B Interface Pin-Out Information (Part 1 of 4)
  • Page 30 A–6 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board Table A–2. HSMC Port B Interface Pin-Out Information (Part 2 of 4) Data Conversion HSMC Schematic Development Board Schematic Cyclone Board Reference Schematic Schematic (J1) Description Signal Name...
  • Page 31 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board A–7 Table A–2. HSMC Port B Interface Pin-Out Information (Part 3 of 4) Data Conversion HSMC Schematic Development Board Schematic Cyclone Board Reference Schematic Schematic (J1) Description Signal Name...
  • Page 32 A–8 Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board Table A–2. HSMC Port B Interface Pin-Out Information (Part 4 of 4) Data Conversion HSMC Schematic Development Board Schematic Cyclone Board Reference Schematic Schematic (J1) Description Signal Name...
  • Page 33 B. Pin-Out Information for the Stratix III (3SL150) Development Board Table B–1 provides the HSMC Port A interface pin-out information for the Stratix III (3SL150) development board. Table B–1. HSMC Port A Interface Pin-Out Information (Part 1 of 3) Data Conversion HSMC Schematic...
  • Page 34 B–2 Appendix B: Pin-Out Information for the Stratix III (3SL150) Development Board Table B–1. HSMC Port A Interface Pin-Out Information (Part 2 of 3) Data Conversion HSMC Schematic Development Board Schematic Board Stratix III Reference Schematic Schematic (J1) Description Signal Name...
  • Page 35 Appendix B: Pin-Out Information for the Stratix III (3SL150) Development Board B–3 Table B–1. HSMC Port A Interface Pin-Out Information (Part 3 of 3) Data Conversion HSMC Schematic Development Board Schematic Board Stratix III Reference Schematic Schematic (J1) Description Signal Name...
  • Page 36 B–4 Appendix B: Pin-Out Information for the Stratix III (3SL150) Development Board Table B–2. HSMC Port B Interface Pin-Out Information (Part 2 of 3) Data Conversion HSMC Schematic Development Board Schematic Board Stratix III Reference Schematic Schematic (J1) Description Signal Name...
  • Page 37 Appendix B: Pin-Out Information for the Stratix III (3SL150) Development Board B–5 Table B–2. HSMC Port B Interface Pin-Out Information (Part 3 of 3) Data Conversion HSMC Schematic Development Board Schematic Board Stratix III Reference Schematic Schematic (J1) Description Signal Name...
  • Page 38 B–6 Appendix B: Pin-Out Information for the Stratix III (3SL150) Development Board Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...
  • Page 39 C. Pin-Out Information for the Cyclone III (3C25) Starter Board Table C–1 provides the HSMC port interface pin-out information for the Cyclone III (3C25) starter board. Table C–1. HSMC Port Interface Pin-Out Information (Part 1 of 3) Data Conversion HSMC Schematic...
  • Page 40 C–2 Appendix C: Pin-Out Information for the Cyclone III (3C25) Starter Board Table C–1. HSMC Port Interface Pin-Out Information (Part 2 of 3) Data Conversion HSMC Schematic Development Board Schematic Board Reference Schematic Schematic Cyclone III (J1) Description Signal Name...
  • Page 41 Appendix C: Pin-Out Information for the Cyclone III (3C25) Starter Board C–3 Table C–1. HSMC Port Interface Pin-Out Information (Part 3 of 3) Data Conversion HSMC Schematic Development Board Schematic Board Reference Schematic Schematic Cyclone III (J1) Description Signal Name...
  • Page 42 C–4 Appendix C: Pin-Out Information for the Cyclone III (3C25) Starter Board Data Conversion HSMC Reference Manual © November 2008 Altera Corporation...

  • Page 43: Additional Information

    Product literature Website www.altera.com/literature Non-technical support (General) Email nacomp@altera.com (Software Licensing) Email authorization@altera.com Note to Table: (1) You can also contact your local Altera sales office or sales representative. © November 2008 Altera Corporation Data Conversion HSMC Reference Manual Preliminary...

  • Page 44: Typographic Conventions

    A warning calls attention to a condition or possible situation that can cause you injury. The angled arrow instructs you to press Enter. The feet direct you to more information about a particular topic. Data Conversion HSMC Reference Manual © November 2008 Altera Corporation Preliminary...

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