Altera cyclone V Technical Reference page 935

Hard processor system
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13-114
err_block_addr3
err_page_addr3 Fields
Bit
15:0
value
err_block_addr3
Erred block address bank 3
Module Instance
nandregs
Offset:
0x540
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
err_block_addr3 Fields
Bit
15:0
value
ECC registers Register Descriptions
Offset:
0x650
ECCCorInfo_b01
ECC Error correction Information register. Controller updates this register when it completes a
transaction. The values are held in this register till a new transaction completes.
Altera Corporation
Name
Holds the page address that resulted in a failure on
program or erase operation.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
Holds the block address that resulted in a failure on
program or erase operation.
on page 13-115
Description
Base Address
0xFFB80000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
value
RO 0x0
Description
Access
Register Address
0xFFB80540
21
20
19
18
5
4
3
2
Access
NAND Flash Controller
cv_5v4
2016.10.28
Reset
RO
0x0
17
16
1
0
Reset
RO
0x0
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