Altera cyclone V Technical Reference page 479
Hard processor system
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Also See for cyclone V:
- Device handbook (1077 pages) ,
- User manual (136 pages) ,
- Reference manual (66 pages)
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cv_5v4
2016.10.28
ETR
Register
read_qos
on page 7-
116
write_qos
on page 7-
116
fn_mod
on page 7-117
EMAC0
Register
read_qos
on page 7-
118
write_qos
on page 7-
119
fn_mod
on page 7-120
EMAC1
Register
read_qos
on page 7-
121
write_qos
on page 7-
121
fn_mod
on page 7-122
USB0
Register
fn_mod_ahb
on page 7-
123
read_qos
on page 7-
124
System Interconnect
Send Feedback
Offset
Width Acces
s
0x47100
32
RW
0x47104
32
RW
0x47108
32
RW
Offset
Width Acces
s
0x48100
32
RW
0x48104
32
RW
0x48108
32
RW
Offset
Width Acces
s
0x49100
32
RW
0x49104
32
RW
0x49108
32
RW
Offset
Width Acces
s
0x4A028
32
RW
0x4A100
32
RW
L3 (NIC-301) GPV Registers Address Map
Reset Value
Read Channel QoS Value
0x0
Write Channel QoS Value
0x0
Issuing Functionality Modification
0x0
Register
Reset Value
Read Channel QoS Value
0x0
Write Channel QoS Value
0x0
Issuing Functionality Modification
0x0
Register
Reset Value
Read Channel QoS Value
0x0
Write Channel QoS Value
0x0
Issuing Functionality Modification
0x0
Register
Reset Value
Functionality Modification AHB
0x0
Register
Read Channel QoS Value
0x0
7-31
Description
Description
Description
Description
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