Altera cyclone V Technical Reference page 289

cv_5v4
2016.10.28
MIXED1IO13
This register is used to control the peripherals connected to nand_wp Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO14
This register is used to control the peripherals connected to nand_we Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO15
This register is used to control the peripherals connected to qspi_io0 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO16
This register is used to control the peripherals connected to qspi_io1 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO17
This register is used to control the peripherals connected to qspi_io2 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO18
This register is used to control the peripherals connected to qspi_io3 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO19
This register is used to control the peripherals connected to qspi_ss0 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO20
This register is used to control the peripherals connected to qpsi_clk Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO21
This register is used to control the peripherals connected to qspi_ss1 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED2IO0
This register is used to control the peripherals connected to emac1_mdio Only reset by a cold reset
(ignores warm reset). NOTE: These registers should not be modified after IO configuration.There is no
support for dynamically changing the Pin Mux selections.
MIXED2IO1
This register is used to control the peripherals connected to emac1_mdc Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
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Pin Mux Control Group Register Descriptions
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