Altera cyclone V Technical Reference page 157

Hard processor system

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Reports FPGA state

Compression. CDRATIO must be programmed

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FPGA in Reset Phase

FPGA in Configuration Phase

FPGA in Initialization Phase. In CVP configu‐

ration, this state indicates IO configuration has

FPGA in User Mode

FPGA state has not yet been determined. This

only occurs briefly after reset.

FPGA Manager

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