Data Dma - Altera cyclone V Technical Reference

13-14
MAP11 Usage Limitations
Address Bits
1:0
MAP11 Usage Limitations
Use the MAP11 commands as follows:
• Use MAP11 commands only in special cases, for debugging or sending device-specific commands that
are not supported by the NAND flash controller.
• DMA must be disabled before you use MAP11 operations.
• The host can use only single beat access transfers when using MAP11 commands.
Note: MAP11 commands provide direct, unstructured access to the NAND flash device. Incorrect use can
lead to unpredictable behavior.

Data DMA

The DMA transfers data with minimal host involvement. Software initiates data DMA with the MAP10
command.
The bit of the
flag
disable this functionality when there are no active transactions pending in the NAND flash controller.
When the DMA is enabled, the flash controller initiates one DMA transfer per MAP10 command over the
DMA master interface. When the DMA is disabled, all operations with the flash controller occur through
the memory-mapped
The NAND flash controller supports up to four outstanding DMA commands, and ignores additional
DMA commands. If software issues more than four outstanding DMA commands, the flash controller
issues the
unsup_cmd
sequencing to transfer the number of pages requested in the DMA command. The DMA master reads or
writes page data from the system memory in programmed burst-length chunks. After the DMA command
completes, the flash controller issues an interrupt, and starts working on the next queued DMA command.
Pipelining allows the NAND flash controller to optimize its performance while executing back-to-back
commands of the same type.
With certain restrictions, non-DMA MAP10 commands can be issued to the NAND flash controller while
the flash controller is servicing DMA transactions. MAP00, MAP01, and MAP11 commands cannot be
issued while DMA mode is enabled because the flash controller is operating in an extremely
tightly-coupled, high-performance data transfer mode. On receipt of erroneous commands (MAP00,
MAP01 or MAP11), the flash controller issues an
violating command.
Altera Corporation
Name
TYPE
register in the
dma_enable
region.
nanddata
interrupt. On receipt of a DMA command, the flash controller performs command
Sets the control type as follows:
• 0 = Command cycle
• 1 = Address cycle
• 2 = Data Read/Write Cycle
group enables data DMA functionality. Only enable or
dma
interrupt to inform the host about the
unsup_cmd
Description
NAND Flash Controller
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2016.10.28