Altera cyclone V Technical Reference page 257

cv_5v4
2016.10.28
31 30
15 14
crc Fields
Bit
31:0
expected
Boot ROM Hardware Register Group Register Descriptions
Registers used by the Boot ROM hardware, not the code within it.
Offset:
0x100
ctrl
on page 5-63
Controls behavior of Boot ROM hardware. All fields are only reset by a cold reset (ignore warm reset).
ctrl
Controls behavior of Boot ROM hardware. All fields are only reset by a cold reset (ignore warm reset).
Module Instance
sysmgr
Offset:
0x100
System Manager
Send Feedback
29 28 27 26
13 12 11 10
Name
Contains the expected CRC of the region in the On-
chip RAM.The Boot ROM code calculates the actual
CRC for all bytes in the region specified by the DATA
START an LENGTH registers. The contents of the
EXECUTION register (after it has been read and
modified by the Boot ROM code) is also included in
the CRC calculation. The contents of the
EXECUTION register is added to the CRC
accumulator a byte at a time starting with the least
significant byte. If the actual CRC doesn't match the
expected CRC value in this register, the Boot ROM
won't boot from the On-chip RAM. The CRC is a
standard CRC32 with the polynomial: x^32 + x^26 +
x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 +
x^7 + x^5 + x^4 + x^2 + x + 1 There is no reflection
of the bits and the initial value of the remainder is
0xFFFFFFFF and the final value is exclusive ORed
with 0xFFFFFFFF.
0xFFD08000
Boot ROM Hardware Register Group Register Descriptions
Bit Fields
25 24 23 22
expected
RW 0xE763552A
9 8 7 6
expected
RW 0xE763552A
Description
Base Address
21 20 19 18
5 4 3 2
Access
Register Address
0xFFD08100
5-63
17 16
1 0
Reset
RW 0xE7635
52A
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