Altera cyclone V Technical Reference page 476

7-28
L3 (NIC-301) GPV Registers Address Map
FPGAMGRDATA
Register
fn_mod_bm_iss
7-87
wr_tidemark
7-87
fn_mod on page 7-88
HPS2FPGA
Register
fn_mod_bm_iss
7-89
wr_tidemark
7-90
fn_mod on page 7-91
ACP
Register
fn_mod_bm_iss
7-92
fn_mod on page 7-93
Boot ROM
Register
fn_mod_bm_iss
7-94
fn_mod on page 7-95
Altera Corporation
Offset
on page 0x23008
on page 0x23040
0x23108
Offset
on page 0x24008
on page 0x24040
0x24108
Offset
on page 0x25008
0x25108
Offset
on page 0x26008
0x26108
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x4
32 RW 0x0
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x4
32 RW 0x0
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x0
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x0
Description
Bus Matrix Issuing Functionality
Modification Register
Write Tidemark
Issuing Functionality Modification
Register
Description
Bus Matrix Issuing Functionality
Modification Register
Write Tidemark
Issuing Functionality Modification
Register
Description
Bus Matrix Issuing Functionality
Modification Register
Issuing Functionality Modification
Register
Description
Bus Matrix Issuing Functionality
Modification Register
Issuing Functionality Modification
Register
System Interconnect
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cv_5v4
2016.10.28