Functional Description Of The Sd/Mmc Controller - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
Signal
sdmmc_data_i
sdmmc_data_o
sdmmc_data_oe
sdmmc_cdn_i
sdmmc_wp_i
sdmmc_vs_o
sdmmc_rstn_o
sdmmc_card_intn_i

Functional Description of the SD/MMC Controller

This section describes the SD/MMC controller components and how the controller operates.
SD/MMC/CE-ATA Protocol
The SD/MMC/CE-ATA protocol is based on command and data bit streams that are initiated by a start bit
and terminated by a stop bit. Additionally, the SD/MMC controller provides a reference clock and is the
only master interface that can initiate a transaction.
• Command—a token transmitted serially on the
• Response—a token from the card transmitted serially on the
commands.
• Data—transferred serially using the data pins for data movement commands.
In the following figure, the clock is a representative only and does not show the exact number of clock
cycles.
SD/MMC Controller
Send Feedback
Width
8
8
1
1
1
1
1
1
†
Functional Description of the SD/MMC Controller
Direction
In
Out
Out
In
In
Out
Out
In
†
pin that starts an operation.
CMD
pin in response to certain
CMD
14-5
Description
Card data
Card detect signal
Card write protect
signal
Voltage switching
between 3.3V and 1.8V
Card reset signal used
in MMC mode
Card interrupt signal
†
†
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