Program Trace Macrocell - Altera cyclone V Technical Reference

cv_5v4
2016.10.28

Program Trace Macrocell

The PTM performs real-time program flow instruction tracing and provides a variety of filters and triggers
that can be used to trace specific portions of code.
The HPS contains two PTMs. Each PTM is paired with a processor and CTI. Trace data generated from
the PTM can be transmitted off-chip using HPS pins, or to the FPGA fabric, where it can be pre-processed
and transmitted off-chip using high-speed FPGA pins.
Related Information
ARM Infocenter
For more information, refer to the CoreSight PTM-A9 Technical Reference Manual .
HPS Debug APB Interface
The HPS can extend the CoreSight debug control bus into the FPGA fabric. The debug interface is an
APB-compatible interface with built-in clock crossing.
Related Information
FPGA Interface
•
HPS Component Interfaces
•
FPGA Interface
The following components connect to the FPGA fabric. This section lists the signals from the debug
system to the FPGA.
DAP
The DAP uses the system APB port to connect to the FPGA.
Table 10-2: DAP
The following table shows the signal description between DAP and FPGA.
h2f_dbg_apb_PADDR
h2f_dbg_apb_PADDR31
h2f_dbg_apb_PENABLE
h2f_dbg_apb_PRDATA[32]
h2f_dbg_apb_PREADY
h2f_dbg_apb_PSEL
h2f_dbg_apb_PSLVERR
h2f_dbg_apb_PWDATA[32]
CoreSight Debug and Trace
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Signal
Address bus to system APB port, when
Address bus to system APB port, when
Enable signal from system APB port
32-bit system APB port read data bus
Ready signal to system APB port
Select signal from system APB port
Error signal to system APB port
32-bit system APB port write data bus
Program Trace Macrocell
Description
PADDR
PADDR31
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