Altera DE2-70 User Manual
  1. Manuals
  2. Brands
  3. Altera Manuals
  4. Computer Hardware
  5. DE2-70
  6. User manual

Altera DE2-70 User Manual

Development and education board
Hide thumbs
Table of Contents

Advertisement

Quick Links

Altera DE2-70 Board
Version 1.01
Copyright © 2007 Terasic Technologies

Advertisement

Table of Contents
loading

Related Manuals for Altera DE2-70

Summary of Contents for Altera DE2-70

  • Page 1 Altera DE2-70 Board Version 1.01 Copyright © 2007 Terasic Technologies...

  • Page 2: Table Of Contents

    SDRAM/SSRAM/Flash Controller and Programmer...16 USB Monitoring...18 PS2 Device...19 SD CARD ...20 Audio Playing and Recording ...21 Overall Structure of the DE2-70 Control Panel ...23 Chapter 4 DE2-70 Video Utility...25 Video Utility Setup...25 VGA Display...26 Video Capture ...27 Overall Structure of the DE2-70 Video Utility ...28 Chapter 5 Using the DE2-70 Board...30...
  • Page 3 Using USB Host and Device...55 5.15 Using IrDA...56 5.16 Using SDRAM/SRAM/Flash...57 Chapter 6 Examples of Advanced Demonstrations ...66 DE2-70 Factory Configuration ...66 TV Box Demonstration...67 TV Box Picture in Picture (PIP) Demonstration...69 USB Paintbrush...72 USB Device...74 A Karaoke Machine ...76 Ethernet Packet Sending/Receiving ...78...

  • Page 4: Chapter 1 De2-70 Package

    DE2-70 User Manual Chapter 1 DE2-70 Package The DE2-70 package contains all components needed to use the DE2-70 board in conjunction with a computer that runs the Microsoft Windows software. 1.1 Package Contents Figure 1.1 shows a photograph of the DE2-70 package.

  • Page 5: The De2-70 Board Assembly

    • CD-ROMs containing Altera’s Quartus Suit Evaluation Edition software. • Bag of six rubber (silicon) covers for the DE2-70 board stands. The bag also contains some extender pins, which can be used to facilitate easier probing with testing equipment of the board’s I/O expansion headers...

  • Page 6: Getting Help

    Here are the addresses where you can get help if you encounter problems: • Altera Corporation 101 Innovation Drive San Jose, California, 95134 USA Email: university@altera.com • Terasic Technologies No. 356, Sec. 1, Fusing E. Rd. Jhubei City, HsinChu County, Taiwan, 302 Email: support@terasic.com Web: DE2-70.terasic.com DE2-70 User Manual...

  • Page 7: Chapter 2 Altera De2-70 Board

    This chapter presents the features and design characteristics of the DE2-70 board. 2.1 Layout and Components A photograph of the DE2-70 board is shown in Figure 2.1. It depicts the layout of the board and indicates the location of the connectors and key components.

  • Page 8: Block Diagram Of The De2-70 Board

    DE2-70 board. In order to use the DE2-70 board, the user has to be familiar with the Quartus II software. The necessary knowledge can be acquired by reading the tutorials Getting Started with Altera’s DE2-70 Board and Quartus II Introduction (which exists in three versions based on the design entry method used, namely Verilog, VHDL or schematic entry).
  • Page 9 Figure 2.2. Block diagram of the DE2-70 board. Following is more detailed information about the blocks in Figure 2.2: Cyclone II 2C70 FPGA • 68,416 LEs • 250 M4K RAM blocks • 1,152,000 total RAM bits • 150 embedded multipliers •...
  • Page 10 • Normally high; generates one active-low pulse when the switch is pressed Toggle switches • 18 toggle switches for user inputs • A switch causes logic 0 when in the DOWN (closest to the edge of the DE2-70 board) position and logic 1 when in the UP position Clock inputs •...
  • Page 11 Audio CODEC • Wolfson WM8731 24-bit sigma-delta audio CODEC • Line-level input, line-level output, and microphone input jacks • Sampling frequency: 8 to 96 KHz • Applications for MP3 players and recorders, PDAs, smart phones, voice recorders, etc. VGA output •...

  • Page 12: Power-Up The De2-70 Board

    4. Connect your headset to the Line-out audio port on the DE2-70 board 5. Turn the RUN/PROG switch on the left edge of the DE2-70 board to RUN position; the PROG position is used only for the AS Mode programming 6.
  • Page 13 • Set the toggle switch SW17 to the UP position and connect the output of an audio player to the Line-in connector on the DE2-70 board; on your headset you should hear the music played from the audio player (MP3, PC, iPod, or the like) •...

  • Page 14: Chapter 3 De2-70 Control Panel

    3.1 Control Panel Setup The Control Panel Software Utility is located in the “DE2_70_control_pane/SW” folder in the DE2-70 System CD-ROM. To install it, just copy the whole folder to your host computer. Launch the control panel by executing the “DE2_70_Control_Panel.exe”.
  • Page 15 7. The Control Panel is now ready for use; experiment by setting the value of some LEDs display and observing the result on the DE2-70 board. The concept of the DE2-70 Control Panel is illustrated in Figure 3.2. The “Control Codes” that performs the control functions is implemented in the FPGA board. It communicates with the Control Panel window, which is active on the host computer, via the USB Blaster link.

  • Page 16: Controlling The Leds, 7-Segment Displays And Lcd Display

    Figure 3.2. The DE2-70 Control Panel concept. The DE2-70 Control Panel can be used to light up LEDs, change the values displayed on 7-segment and LCD displays, monitor buttons/switches status, read/write the SDRAM, SSRAM and Flash Memory, monitor the status of an USB mouse, read data from a PS/2 keyboard, and read SD-CARD specification information.
  • Page 17 DE2-70 User Manual Figure 3.3. Controlling LEDs. Choosing the 7-SEG tab leads to the window in Figure 3.4. In the tab sheet, directly use the Up-Down control and Dot Check box to specified desired patterns, the 7-SEG patterns on the board will be updated immediately.

  • Page 18: Switches And Buttons

    DE2-70 User Manual Choosing the LCD tab leads to the window in Figure 3.5. Text can be written to the LCD display by typing it in the LCD box and pressing the Set button. Figure 3.5. Controlling LEDs and the LCD display.

  • Page 19: Sdram/Ssram/Flash Controller And Programmer

    The Control Panel can be used to write/read data to/from the SDRAM, SSRAM, and FLASH chips on the DE2-70 board. We will describe how the SDRAM-U1 may be accessed; the same approach is used to access the SDRAM-U2, SRAM, and FLASH. Click on the Memory tab and select “SDRAM-U1”...
  • Page 20 ASCII text files that specify memory values using ASCII characters to represent hexadecimal values. For example, a file containing the line defines four 8-bit values: 01, 23, 45, 67, 89, AB, CD, EF. These values will be loaded consecutively 0123456789ABCDEF DE2-70 User Manual...

  • Page 21: Usb Monitoring

    The Control Panel provides users a USB monitoring tool which monitors the real-time status of a USB mouse connected to the DE2-70 board. The movement of the mouse and the status of the three buttons will be shown in the graphical and text interface. The mouse movement is translated as a position (x,y) with range from (0,0)~(1023,767).

  • Page 22: Ps2 Device

    Start to Stop. 4. In the receiving process, users can start to press the attached keyboard. The input data will be displayed in the control window in real time. Press Stop to terminate the monitoring process. DE2-70 User Manual...

  • Page 23: Sd Card

    1. Choosing the SD-CARD tab leads to the window in Figure 3.10. First, 2. Insert a SD card to the DE2-70 board, then press the Read button to read the SD card. The SD card’s identification and specification will be displayed in the control window.

  • Page 24: Audio Playing And Recording

    3.8 Audio Playing and Recording This interesting audio tool is designed to control the audio chip on the DE2-70 board for audio playing and recording. It can play audio stored in a given WAVE file, record audio, and save the audio signal as a wave file.
  • Page 25 4. To stop recording, click “Stop Record”. Finally, audio signal saved in SDRAM-U1 will be uploaded to the host computer and displayed on the waveform window. Click “Save Wave” to save the waveform into a WAV file. DE2-70 User Manual...

  • Page 26: Overall Structure Of The De2-70 Control Panel

    3.9 Overall Structure of the DE2-70 Control Panel The DE2-70 Control Panel is based on a NIOS II system running in the Cyclone II FPGA with the SDRAM-U2 or SSRAM. The software part is implemented in C code; the hardware part is implemented in Verilog code with SOPC builder, which makes it possible for a knowledgeable user to change the functionality of the Control Panel.
  • Page 27 FPGA/ SOPC NIOS II TIMER JTAG JTAG Blaster Hardware Figure 3.13. The block diagram of the DE2-70 control panel. SEG7 Controller SDRAM Controller SDRAM Controller LCD Controller USB Controller PS2 Controller PIO Controller Avalon- MM Flash Controller Tris tate Bridge...

  • Page 28: Chapter 4 De2-70 Video Utility

    DE2-70 Video Utility The DE2-70 board comes with a video utility that allows users to access video components on the board from a host computer. The host computer communicates with the board through the USB-Blaster link. The facility can be used to verify the functionality of video components on the board, capture the video sent from the video-in ports, or display desired pattern on the VGA port.

  • Page 29: Vga Display

    Figure 4.1. The DE2-70 Video Utility window. 4.2 VGA Display Choosing the Display tab in the DE2-70 Video Utility leads to the window shown in Figure 4.2. The function is designed to download an image from the host computer to the FPGA board and output the image through the VGA interface with resolution 640x480.

  • Page 30: Video Capture

    Click Capture button to start capturing process. Then, you will see the captured image shown in the display window of the Video Utility. The image dimension of the captured image is also displayed. Users can click Save button to save the captured image as a bitmap or jpeg file. DE2-70 User Manual...

  • Page 31: Overall Structure Of The De2-70 Video Utility

    4.4 Overall Structure of the DE2-70 Video Utility The DE2-70 Video Utility is based on a NIOS II system running in the Cyclone II FPGA with the SDRAM-U2 or SSRAM. The software part is implemented in C code; the hardware part is implemented in Verilog code with SOPC builder, which makes it possible for a knowledgeable user to change the functionality of the Video Utility.
  • Page 32 Host computer converts the raw image data to RGB color space and displays it. SDRAM Controller SDRAM Controller Controller Multi - Port SSRAM Controller Avalon MM Slave VIDEO-In Controller DE2-70 User Manual NIOS II Program SDRAM-U1 SDRAM-U2 SSRAM VIDEO IN...

  • Page 33: Chapter 5 Using The De2-70 Board

    This chapter gives instructions for using the DE2-70 board and describes each of its I/O devices. 5.1 Configuring the Cyclone II FPGA The procedure for downloading a circuit from a host computer to the DE2-70 board is described in the tutorial Quartus II Introduction. This tutorial is found in the DE2_70_tutorials folder on the DE2-70 System CD-ROM.
  • Page 34 Cyclone II FPGA, perform the following steps: • Ensure that power is applied to the DE2-70 board • Connect the supplied USB cable to the USB Blaster port on the DE2-70 board (see Figure 2.1) • Configure the JTAG programming circuit by setting the RUN/PROG switch (on the left side of the board) to the RUN position.

  • Page 35: Using The Leds And Switches

    Figure 5.2. The AS configuration scheme. In addition to its use for JTAG and AS programming, the USB Blaster port on the DE2-70 board can also be used to control some of the board's features remotely from a host computer. Details that describe this method of using the USB Blaster port are given in Chapter 3.
  • Page 36 DE2-70 User Manual There are also 18 toggle switches (sliders) on the DE2-70 board. These switches are not debounced, and are intended for use as level-sensitive data inputs to a circuit. Each switch is connected directly to a pin on the Cyclone II FPGA. When a switch is in the DOWN position (closest to the edge of the board) it provides a low logic level (0 volts) to the FPGA, and when the switch is in the UP position it provides a high logic level (3.3 volts).
  • Page 37 SW[14] PIN_L5 SW[15] PIN_L4 Description Toggle Switch[0] Toggle Switch[1] Toggle Switch[2] Toggle Switch[3] Toggle Switch[4] Toggle Switch[5] Toggle Switch[6] Toggle Switch[7] Toggle Switch[8] Toggle Switch[9] Toggle Switch[10] Toggle Switch[11] Toggle Switch[12] Toggle Switch[13] Toggle Switch[14] Toggle Switch[15] DE2-70 User Manual...
  • Page 38 LED Red[6] LED Red[7] LED Red[8] LED Red[9] LED Red[10] LED Red[11] LED Red[12] LED Red[13] LED Red[14] LED Red[15] LED Red[16] LED Red[17] LED Green[0] LED Green[1] LED Green[2] LED Green[3] LED Green[4] LED Green[5] LED Green[6] DE2-70 User Manual...

  • Page 39: Using The 7-Segment Displays

    Table 5.3. Pin assignments for the LEDs. 5.3 Using the 7-segment Displays The DE2-70 Board has eight 7-segment displays. These displays are arranged into two pairs and a group of four, with the intent of displaying numbers of various sizes. As indicated in the schematic in Figure 5.6, the seven segments are connected to pins on the Cyclone II FPGA.
  • Page 40 Seven Segment Decimal Point 3 Seven Segment Digit 4[0] Seven Segment Digit 4[1] Seven Segment Digit 4[2] Seven Segment Digit 4[3] Seven Segment Digit 4[4] Seven Segment Digit 4[5] Seven Segment Digit 4[6] Seven Segment Decimal Point 4 DE2-70 User Manual...

  • Page 41: Clock Circuitry

    PLL circuit. The clock distribution on the DE2-70 board is shown in Figure 5.8. The associated pin assignments for clock inputs to FPGA I/O pins are listed in Table 5.5.
  • Page 42 Cyclone II FPGA SDRAM SSRAM Description 28 MHz clock input 50 MHz clock input 50 MHz clock input 50 MHz clock input 50 MHz clock input External (SMA) clock input DE2-70 User Manual SD Card AUDIO CODEC PS/2 Ethernet FLASH...

  • Page 43: Using The Lcd Module

    Datasheet/LCD folder on the DE2-70 System CD-ROM. A schematic diagram of the LCD module showing connections to the Cyclone II FPGA is given in Figure 5.9. The associated pin assignments appear in Table 5.6.

  • Page 44: Using The Expansion Header

    LCD_BLON Table 5.6. Pin assignments for the LCD module. Note that the current LCD modules used on DE2/DE2-70 boards do not have backlight. Therefore the LCD_BLON signal should not be used in users’ design projects. 5.6 Using the Expansion Header The DE2-70 Board provides two 40-pin expansion headers.
  • Page 45 Figure 5.11. Schematic diagram of the expansion headers. Signal Name FPGA Pin No. IO_A [0] PIN_C30 IO_A [1] PIN_C29 IO_A [2] PIN_E28 1.8V 2.5V 3.3V Description GPIO Connection 0 IO[0] GPIO Connection 0 IO[1] GPIO Connection 0 IO[2] DE2-70 User Manual...
  • Page 46 GPIO Connection 0 IO[31] GPIO Connection 0 PLL In GPIO Connection 0 PLL In GPIO Connection 0 PLL Out GPIO Connection 0 PLL Out GPIO Connection 1 IO[0] GPIO Connection 1 IO[1] GPIO Connection 1 IO[2] GPIO Connection 1 IO[3] DE2-70 User Manual...
  • Page 47 GPIO Connection 1 IO[27] GPIO Connection 1 IO[28] GPIO Connection 1 IO[29] GPIO Connection 1 IO[30] GPIO Connection 1 IO[31] GPIO Connection 1 PLL In GPIO Connection 1 PLL In GPIO Connection 1 PLL Out GPIO Connection 1 PLL Out DE2-70 User Manual...

  • Page 48: Using Vga

    DE2-70 User Manual 5.7 Using VGA The DE2-70 board includes a 16-pin D-SUB connector for VGA output. The VGA synchronization signals are provided directly from the Cyclone II FPGA, and the Analog Devices ADV7123 triple 10-bit high-speed video DAC is used to produce the analog data signals (red, green, and blue). The associated schematic is given in Figure 5.12 and can support resolutions of up to 1600 x 1200 pixels,...
  • Page 49 Datasheet/VGA DAC folder on the DE2-70 System CD-ROM. The pin assignments between the Cyclone II FPGA and the ADV7123 are listed in Table 5.11. An example of code that drives a VGA display is described in Sections 6.2, 6.3 and 6.4.
  • Page 50 VGA Green[6] VGA Green[7] VGA Green[8] VGA Green[9] VGA Blue[0] VGA Blue[1] VGA Blue[2] VGA Blue[3] VGA Blue[4] VGA Blue[5] VGA Blue[6] VGA Blue[7] VGA Blue[8] VGA Blue[9] VGA Clock VGA BLANK VGA H_SYNC VGA V_SYNC VGA SYNC DE2-70 User Manual...

  • Page 51: Using The 24-Bit Audio Codec

    5.8 Using the 24-bit Audio CODEC The DE2-70 board provides high-quality 24-bit audio via the Wolfson WM8731 audio CODEC (enCOder/DECoder). This chip supports microphone-in, line-in, and line-out ports, with a sample rate adjustable from 8 kHz to 96 kHz. The WM8731 is controlled by a serial I2C bus interface, which is connected to pins on the Cyclone II FPGA.

  • Page 52: Rs-232 Serial Port

    UART_RTS 5.10 PS/2 Serial Port The DE2-70 board includes a standard PS/2 interface and a connector for a PS/2 keyboard or mouse. In addition, users can use the PS/2 keyboard and mouse on the DE2-70 board simultaneously by an plug an extension PS/2 Y-Cable. Figure 5.16 shows the schematic of the PS/2 circuit. Instructions for using a PS/2 mouse or keyboard can be found by performing an appropriate search on various educational web sites.

  • Page 53: Fast Ethernet Network Controller

    Ethernet interface, and the associated pin assignments are listed in Table 5.15. For detailed information on how to use the DM9000A refer to its datasheet and application note, which are available on the manufacturer’s web site, or in the Datasheet/Ethernet folder on the DE2-70 System CD-ROM.
  • Page 54 Description DM9000A DATA[0] DM9000A DATA[1] DM9000A DATA[2] DM9000A DATA[3] DM9000A DATA[4] DM9000A DATA[5] DM9000A DATA[6] DM9000A DATA[7] DM9000A DATA[8] DM9000A DATA[9] DM9000A DATA[10] DM9000A DATA[11] DM9000A DATA[12] DM9000A DATA[13] DM9000A DATA[14] DM9000A DATA[15] DM9000A Clock 25 MHz DE2-70 User Manual...

  • Page 55: Tv Decoder

    Table 5.15. Fast Ethernet pin assignments. 5.12 TV Decoder The DE2-70 board is equipped with two Analog Devices ADV7180 TV decoder chips. The ADV7180 is an integrated video decoder that automatically detects and converts a standard analog baseband television signal (NTSC, PAL, and SECAM) into 4:2:2 component video data compatible with the 8-bit ITU-R BT.656 interface standard.
  • Page 56 TV Decoder 1 Data[0] TV Decoder 1 Data[1] TV Decoder 1 Data[2] TV Decoder 1 Data[3] TV Decoder 1 Data[4] TV Decoder 1 Data[5] TV Decoder 1 Data[6] TV Decoder 1 Data[7] TV Decoder 1 H_SYNC TV Decoder 1 V_SYNC DE2-70 User Manual...

  • Page 57: Implementing A Tv Encoder

    Table 5.16. TV Decoder pin assignments. 5.13 Implementing a TV Encoder Although the DE2-70 board does not include a TV encoder chip, the ADV7123 (10-bit high-speed triple ADCs) can be used to implement a professional-quality TV encoder with the digital processing part implemented in the Cyclone II FPGA.

  • Page 58: Using Usb Host And Device

    Datasheet/USB folder on the DE2-70 System CD-ROM. The most challenging part of a USB application is in the design of the software driver needed. Two complete examples of USB drivers, for both host and device applications, can be found in Sections 6.4 and 6.5.

  • Page 59: Using Irda

    The datasheet for this device is provided in the Datasheet\IrDA folder on the DE2-70 System CD-ROM. Note that the highest transmission rate supported is 115.2 Kbit/s and both the TX and RX sides have to use the same transmission rate. Figure 5.21 shows the schematic of the IrDA communication link.

  • Page 60: Using Sdram/Sram/Flash

    IRDA_RXD 5.16 Using SDRAM/SRAM/Flash The DE2-70 board provides a 2-Mbyte SSRAM, 8-Mbyte Flash memory, and two 32-Mbyte SDRAM chips. Figures 5.22, 5.23, and 5.24 show the schematics of the memory chips. The pin assignments for each device are listed in Tables 5.19, 5.20, and 5.21. The datasheets for the memory chips are provided in the Datasheet/Memory folder on the DE2-70 System CD-ROM.
  • Page 61 DE2-70 User Manual Figure 5.22. SDRAM schematic.
  • Page 62 RESET# FLASH_WP_n WP#ACC FLASH_RY RY/BY# FLASH_CE_n FLASH_OE_n FLASH_BYTE_n BYTE# F_VCC33 4.7K 4.7K FLASH_RY 4.7K 4.7K FLASH_CE_n Figure 5.24. Flash schematic. DE2-70 User Manual SRAM_data0 DQA0 SRAM_data1 DQA1 SRAM_data2 DQA2 SRAM_data3 DQA3 SRAM_data4 DQA4 SRAM_data5 DQA5 SRAM_data6 DQA6 SRAM_data7 DQA7 SRAM_datapar0...
  • Page 63 SDRAM 1 Data[13] SDRAM 1 Data[14] SDRAM 1 Data[15] SDRAM 1 Bank Address[0] SDRAM 1 Bank Address[1] SDRAM 1 Low-byte Data Mask SDRAM 1 High-byte Data Mask SDRAM 1 Row Address Strobe SDRAM 1 Column Address Strobe DE2-70 User Manual...
  • Page 64 SDRAM 2 Data[9] SDRAM 2 Data[10] SDRAM 2 Data[11] SDRAM 2 Data[12] SDRAM 2 Data[13] SDRAM 2 Data[14] SDRAM 2 Data[15] SDRAM 2 Bank Address[0] SDRAM 2 Bank Address[1] SDRAM 2 Low-byte Data Mask SDRAM 2 High-byte Data Mask DE2-70 User Manual...
  • Page 65 SRAM Address[8] SRAM Address[9] SRAM Address[10] SRAM Address[11] SRAM Address[12] SRAM Address[13] SRAM Address[14] SRAM Address[15] SRAM Address[16] SRAM Address[17] SRAM Address[18] SRAM Data[0] SRAM Data[1] SRAM Data[2] SRAM Data[3] SRAM Data[4] SRAM Data[5] SRAM Data[6] SRAM Data[7] DE2-70 User Manual...
  • Page 66 SRAM Burst Address Advance SRAM Byte Write Enable[0] SRAM Byte Write Enable[1] SRAM Byte Write Enable[2] SRAM Byte Write Enable[3] SRAM Chip Enable 1 SRAM Chip Enable 2 SRAM Chip Enable 3 SRAM Clock SRAM Parity Data[0] SRAM Parity Data[1] DE2-70 User Manual...
  • Page 67 FLASH Address[8] FLASH Address[9] FLASH Address[10] FLASH Address[11] FLASH Address[12] FLASH Address[13] FLASH Address[14] FLASH Address[15] FLASH Address[16] FLASH Address[17] FLASH Address[18] FLASH Address[19] FLASH Address[20] FLASH Address[21] FLASH Data[0] FLASH Data[1] FLASH Data[2] FLASH Data[3] FLASH Data[4] DE2-70 User Manual...
  • Page 68 FLASH Data[9] FLASH Data[10] FLASH Data[11] FLASH Data[12] FLASH Data[13] FLASH Data[14] FLASH Data[15] FLASH Byte/Word Mode Configuration FLASH Chip Enable FLASH Output Enable FLASH Reset LASH Ready/Busy output FLASH Write Enable FLASH Write Protect /Programming Acceleration DE2-70 User Manual...

  • Page 69: Chapter 6 Examples Of Advanced Demonstrations

    • Project directory: DE2_70_Default • Bit stream used: DE2_70_Default.sof or DE2_70_Default.pof • Power on the DE2-70 board, with the USB cable connected to the USB Blaster port. If necessary (that is, if the default factory configuration of the DE2-70 board is not currently...

  • Page 70: Tv Box Demonstration

    This demonstration plays video and audio input from a DVD player using the VGA output, audio CODEC, and one TV decoder (U11) on the DE2-70 board. Figure 6.1 shows the block diagram of the design. There are two major blocks in the circuit, called I2C_AV_Config and TV_to_VGA. The TV_to_VGA block consists of the ITU-R 656 Decoder, SDRAM Frame Buffer, YUV422 to YUV444, YCrCb to RGB, and VGA Controller.
  • Page 71 4:3 aspect ratio o Non-progressive video • Connect the VGA output of the DE2-70 board to a VGA monitor (both LCD and CRT type of monitors should work) • Connect the audio output of the DVD player to the line-in port of the DE2-70 board and connect a speaker to the line-out port.

  • Page 72: Tv Box Picture In Picture (Pip) Demonstration

    Figure 6.2. The setup for the TV box demonstration. 6.3 TV Box Picture in Picture (PIP) Demonstration The DE2-70 board has two TV decoders and RCA jacks that allow users to process two video sources simultaneously using the 2C70 FPGA. This demonstration will multiplex two different...
  • Page 73 • Connect the one audio output of the DVD player to the line-in port of the DE2-70 board and connect a speaker to the line-out port. If the audio output jacks from the DVD player are of...
  • Page 74 RCA type, then an adaptor will be needed to convert to the mini-stereo plug supported on the DE2-70 board; this is the same type of plug supported on most computers • Load the bit stream into FPGA. • The detailed configuration for switching video source of main and sub window are listed in Table 6.1.

  • Page 75: Usb Paintbrush

    Once the program running on the Nios II processor is started, it will detect the existence of the USB mouse connected to DE2-70 board. Once the mouse is moved, the Nios II processor is able to keep track of the movement and record it in a frame buffer memory. The VGA Controller will overlap the data stored in the frame buffer with a default image pattern and display the overlapped image on the VGA display.
  • Page 76 Nios II Workspace: DE2_70_NIOS_HOST_MOUSE_VGA\Software • Connect a USB Mouse to the USB Host Connector (type A) of the DE2-70 board • Connect the VGA output of the DE2-70 board to a VGA monitor (both LCD and CRT type of monitors should work) •...

  • Page 77: Usb Device

    DE2-70 board’s Philips ISP1362 device. After connecting the DE2-70 board to a USB port on the host computer, a software program has to be executed on the Nios II processor to initialize the Philips ISP1362 chip. Once the software program is successfully executed, the host computer will identify the new device in its USB device list and ask for the associated driver;...
  • Page 78 • Nios II Workspace: DE2_70_NIOS_DEVICE_LED\HW\Software • Borland BC++ Software Driver: DE2_70_NIOS_DEVICE_LED\SW • Connect the USB Device connector of the DE2-70 board to the host computer using a USB cable (type A → B). • Load the bit stream into FPGA •...

  • Page 79: A Karaoke Machine

    Figure 6.8. The setup for the USB device demonstration. 6.6 A Karaoke Machine This demonstration uses the microphone-in, line-in, and line-out ports on the DE2-70 board to create a Karaoke Machine application. The Wolfson WM8731 audio CODEC is configured in the master mode, where the audio CODEC generates AD/DA serial bit clock (BCK) and the left/right channel clock (LRCK) automatically.
  • Page 80 • Project directory: DE2-70_i2sound • Bit stream used: DE2-70_i2sound.sof or DE2-70_i2sound.pof • Connect a microphone to the microphone-in port (pink color) on the DE2-70 board • Connect the audio output of a music-player, such as an MP3 player or computer, to the line-in port (blue color) on the DE2-70 board •...

  • Page 81: Ethernet Packet Sending/Receiving

    In this demonstration, we will show how to send and receive Ethernet packets using the Fast Ethernet controller on DE2-70 board. As illustrated in Figure 6.11, we use the Nios II processor to send and receive Ethernet packets using the DM9000A Ethernet PHY/MAC Controller. The demonstration can be set up to use either a loop-back connection from one board to itself, or two DE2-70 boards connected together.
  • Page 82 MAC address of the DE2-70 board. If the packet received does have the same MAC address or is a broadcast packet, the DM9000A will accept the packet and send an interrupt to the Nios II processor. The processor will then display the packet contents in the Nios II IDE console window.

  • Page 83: Sd Card Music Player

    DE2-70 board. In this demonstration we show how to implement an SD Card Music Player on the DE2-70 board, in which the music files are stored in an SD card and the board can play the music files via its CD-quality audio DAC circuits.
  • Page 84 DE2-70 User Manual Figure 6.13 shows the hardware block diagram of this demonstration. The system requires a 50 MHZ clock provided from the board. The PLL generates a 100-MHZ clock for NIOS II processor and the other controllers except for the audio controller. The audio chip is controlled by the Audio Controller which is a user-defined SOPC component.
  • Page 85 • Load the bitstream into the FPGA on the DE2-70 board. • Run the Nios II IDE under the workspace DE2_70_SD_Card_Audio_Playe\Software • Connect a headset or speaker to the DE2-70 board and you should be able to hear the music played from the SD Card...

  • Page 86: Music Synthesizer Demonstration

    • Press KEY3 on the DE2-70 board can play the next music file stored in the SD card. • Press KEY2 and KEY1 will increase and decrease the output music volume respectively. Figure 6.16 illustrates the setup for this demonstration.
  • Page 87 SW9. To repeat the demo sound, users can press KEY1. The TONE_GENERATOR has two tones: (1) String. (2) Brass, which can be controlled by SW0. The audio codec used on the DE2-70 board has two channels, which can be turned ON/OFF using SW1 and SW2.
  • Page 88 • Bit stream used: DE2_70_Synthesizer.sof or DE2-70_Synthesizer.pof • Connect a PS/2 Keyboard to the DE2-70 board. • Connect the VGA output of the DE2-70 board to a VGA monitor (both LCD and CRT type of monitors should work) • Connect the Lineout of the DE2-70 board to a speaker.
  • Page 89 Figure 6.16. The Setup of the Music Synthesizer Demonstration. C D E F G A B C D E F G A B C D E F G A B VGA(LCD/CRT)Monitor VGA Out Keyboard Input Keyboard Algorithms for Audio Processing DE2-70 User Manual...

  • Page 90: Audio Recording And Playing

    DE2-70 User Manual 6.10 Audio Recording and Playing This demonstration shows how to implement an audio recorder and player using the DE2-70 board with the built-in Audio CODEC chip. This demonstration is developed based on SOPC Builder and NIOS II IDE.
  • Page 91 • Software Project directory: DE2_70_AUDIO\software\project_audio • Software Execution File: DE2_70_AUDIO\software\project_auido\audio\debug\audio.elf • Connect an Audio Source to the LINE-IN port of the DE2-70 board. • Connect a Microphone to MIC-IN port on the DE2-70 board. • Connect a speaker or headset to LINE-OUT port on the DE2-70 board.
  • Page 92 • Load the Software Execution File into FPGA. ( • Configure audio with the toggle switches. • Press KEY3 on the DE2-70 board to start/stop audio recoding ( • Press KEY2 on the DE2-70 board to start/stop audio playing ( Note: (1).

  • Page 93: Chapter 7 Appendix

    7.1 Revision History Version V1.0 V1.01 7.2 Copyright Statement Copyright © 2007 Terasic Technologies. All rights reserved. Chapter 7 Appendix Change Log Initial Version (Preliminary) 1. Add appendix chapter. 2. Modify Chapter 2,3,4,5,6. DE2-70 User Manual...

Table of Contents