Altera cyclone V Technical Reference page 893

Hard processor system
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13-72
spare_area_marker
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
spare_area_skip_bytes Fields
Bit
5:0
value
spare_area_marker
Spare area marker value
Module Instance
nandregs
Offset:
0x240
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Number of bytes to skip from start of spare area
before last ECC sector data starts. The bytes will be
written with the value programmed in the spare_
area_marker register. This register could be
potentially used to preserve the bad block marker in
the spare area by marking it good. The default value is
zero which means no bytes will be skipped and last
ECC sector will start from the beginning of spare
area.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
0xFFB80000
21
20
19
18
5
4
3
2
value
RW 0x0
Access
Register Address
0xFFB80240
NAND Flash Controller
cv_5v4
2016.10.28
17
16
1
0
Reset
RW
0x0
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