Altera cyclone V Technical Reference page 903

13-82
device_param_2
device_param_1 Fields
Bit
7:0
value
device_param_2
Module Instance
nandregs
Offset:
0x340
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
device_param_2 Fields
Bit
7:0
value
logical_page_data_size
Logical page data area size in bytes
Module Instance
nandregs
Offset:
0x350
Access:
RO
Altera Corporation
Name
4th byte relating to Device Signature. This register is
updated only for Legacy NAND devices.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Reserved
Name
Reserved.
Description
Base Address
0xFFB80000
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Description
Base Address
0xFFB80000
Access
Register Address
0xFFB80340
21 20 19 18
5 4 3 2
value
RO 0x0
Access
Register Address
0xFFB80350
NAND Flash Controller
cv_5v4
2016.10.28
Reset
RO 0x0
17 16
1 0
Reset
RO 0x0
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