Altera cyclone V Technical Reference page 1043

cv_5v4
2016.10.28
Module Instance
sdmmc
Offset:
0x24
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
ebe acd sbe
RW 0x0 RW
0x0 0x0
intmask Fields
Bit
16
sdio_int_mask
15
ebe
SD/MMC Controller
Send Feedback
0xFF704000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
hle frun hto
RW RW RW RW
0x0 0x0 0x0
Name
In current application, MMC-Ver3.3 only Bit 16 of
this field is used. Bits 17 to 31 are unused and return 0
Value
0x0
0x1
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
drt rto dcrc rcrc
RW RW RW RW
0x0 0x0 0x0 0x0
Description
Description
SDIO Mask Interrupt Disabled
SDIO Interrupt Enabled
Description
End-bit error Mask
End-bit error No Mask
intmask
Register Address
0xFF704024
21 20 19 18
5 4 3 2
rxdr txdr dto cmd
RW RW RW RW
0x0 0x0 0x0 0x0
Access
14-97
17 16
sdio_
int_mask
RW 0x0
1 0
re cd
RW RW 0x0
0x0
Reset
RW 0x0
RW 0x0
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