Altera cyclone V Technical Reference page 1011

Hard processor system
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cv_5v4
2016.10.28
The host must follow the existing MMC discovery procedure to negotiate the MMC TRAN state. After
completing normal MMC reset and initialization procedures, the host must query the initial ATA task file
values using the RW_REG or CMD39 command.
By default, the MMC block size is 512 bytes—indicated by bits 1:0 of the srcControl register inside the
CE-ATA card device. The host can negotiate the use of a 1 KB or 4 KB MMC block sizes. The card
indicates MMC block sizes that it can support through the srcCapabilities register in the MMC; the host
reads this register to negotiate the MMC block size. Negotiation is complete when the host controller
writes the MMC block size into the srcControl register bits 1:0 of the card.
Related Information
www.jedec.org
For information about the (MMC TRAN) state, MMC reset and initialization, refer to JEDEC Standard
No. 84-A441, available on the JEDEC website.
ATA Payload Transfer Using the RW_MULTIPLE_BLOCK (RW_BLK) Command
This command involves data transfer between the CE-ATA card device and the controller. To send a data
command, the controller needs a command argument, total data size, and block size. Software receives or
sends data through the FIFO buffer.
Implementing ATA Payload Transfer
To implement an ATA payload transfer (read or write), perform the following steps:
1. Write the data size in bytes to the
2. Write the block size in bytes to the
transfer.
3. Write to the
Register Settings for ATA Payload Transfer
You must set the
Table 14-32: cmdarg Register Settings for ATA Payload Transfer
Bits
31
30:24
23:16
15:8
7:0
Table 14-33: cmd Register Settings for ATA Payload Transfer
Bits
start_cmd
SD/MMC Controller
Send Feedback
ATA Payload Transfer Using the RW_MULTIPLE_BLOCK (RW_BLK) Command
register to indicate the data unit count.
cmdarg
,
,
cmdarg
cmd
blksiz
Value
1 or 0
0
0
Data count
Data count
1
register.
bytcnt
register. The controller expects a single/multiple block
blksiz
, and
registers according to the following tables.
bytcnt
Set to 0 for read operation or set to 1 for write operation
Reserved (bits set to 0 by host processor)
Reserved (bits set to 0 by host processor)
Data Count Unit [15:8]
Data Count Unit [7:0]
Value
Comment
Comment
-
14-65
Altera Corporation

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