Altera cyclone V Technical Reference page 1022

14-76
Boot Operation for eMMC Card Device
• Set up the descriptors as described in Internal DMA Controller Transmission Sequences and Internal
DMA Controller Reception Sequences".
• Set the
4. Set the card device frequency to 400 kHz using the
Clock Setup.
5. Set the
6. Set the
7. Set the
card device.
8. Set the
half the FIFO buffer depth.
9. Set the following fields in the
• Initiate the command by setting
• Enable boot (
• Expect boot acknowledge (
• If a start-acknowledge pattern is expected from the card device, set
• If a start-acknowledge pattern is not expected from the card device, set
• Card number (
•
data_expected
• Reset the remainder of
10.If no start-acknowledge pattern is expected from the card device (
to step
11.This step handles the case where a start-acknowledge pattern is expected (
step
1 in
a. If the Boot ACK Received interrupt is not received from the controller within 50 ms of initiating the
command
•
start_cmd
• Disable boot (
•
card_number
• All other fields = 0
The controller generates a Command Done interrupt after deasserting the
interface.
If internal DMA controller mode is used for the boot process, the controller performs the following
steps after the Boot ACK Received timeout:
• The DMA descriptor is closed.
• The
• The
b. If the Boot ACK Received interrupt is received, the software driver must clear this interrupt by
writing 1 to the
Within 0.95 seconds of the Boot ACK Received interrupt, the Boot Data Start interrupt must be
received from the controller. If this does not occur, the software driver must write the following
register fields:
•
start_cmd
• disable_boot = 1
• card_number = 0
• All other fields = 0
Altera Corporation
use_internal_dmac
†
field of the
data_timeout
register to 0x200 (512 bytes).
blksiz
register to a multiple of 128 KB, as indicated by the BOOT_SIZE_MULT value in the
bytcnt
†
field in the
rx_wmark fifoth
†
cmd
) = 1
enable_boot
expect_boot_ack
card_number
†
= 1
register bits to 0
cmd
†
12.
†
9).
9), the software driver must set the following
(step
†
= 1
disable_boot
†
= 0
†
†
bit in the register is set, indicating the Boot ACK Received timeout.
ces idsts
bit of the register is not set.
ri idsts
bit in the
ces
†
†
= 1
†
†
†
†
bit of the register to 1.
ctrl
clkdiv
register equal to the card device total access time, N
tmout
†
register. Typically, the threshold value can be set to 512, which is
†
register:
†
= 1
start_cmd
†
†
):
†
) = 0
†
†
)= 1
†
†
†
†
register.
idsts
†
registers. For more information, refer to
expect_boot_ack
expect_boot_ack
expect_boot_ack
expect_boot_ack
register fields:
cmd
pin of the card
CMD
cv_5v4
2016.10.28
†
.
AC
†
to 1.
†
to 0.
set to 0) proceed
was set to
†
†
cmd
SD/MMC Controller
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