Altera cyclone V Technical Reference page 1044

14-98
intmask
Bit
14
acd
13
sbe
12
hle
11
frun
10
hto
9
drt
Altera Corporation
Name
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Bits used to mask unwanted interrupts. Value of 0
masks interrupts, value of 1 enables interrupt.
Value
0x0
0x1
Description
Description
Auto command done Mask
Auto command done No Mask
Description
Start-bit error Mask
Start-bit error No Mask
Description
Hardware locked write error Mask
Hardware locked write error No Mask
Description
FIFO underrun/overrun error Mask
FIFO underrun/overrun error No Mask
Description
Data starvation by host timeout Mask
Data starvation by host timeout No Mask
Description
Data read timeout Mask
Data read timeout No Mask
cv_5v4
2016.10.28
Access Reset
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
SD/MMC Controller
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