Altera cyclone V Technical Reference page 1027

cv_5v4
2016.10.28
5. Wait for a time that ensures that at least 74 card clock cycles have occurred on the card interface.
6. Set the
data_timeout
7. Set the
blksiz
8. Set the
bytcnt
card device.
9. Set the
rx_wmark
half the FIFO buffer depth.
10.Set the
cmdarg
11.Initiate the command, by setting the
•
start_cmd
•
enable_boot
•
expect_boot_ack:
• If a start-acknowledge pattern is expected from the card device, set
• If a start-acknowledge pattern is not expected from the card device, set
•
card_number
•
data_expected
•
cmd_index
• Set the remainder of
12.If no start-acknowledge pattern is expected from the card device (
step 15.
13.Wait for the Command Done interrupt.
14.This step handles the case where a start-acknowledge pattern is expected (
step
1 in
a. If the Boot ACK Received interrupt is not received from the controller within 50 ms of initiating the
command
boot process and start with normal discovery.
If internal DMA controller mode is used for the boot process, the controller performs the following
steps after the Boot ACK Received timeout:
• The DMA descriptor is closed.
• The
• The
b. If the Boot ACK Received interrupt is received, the software driver must clear this interrupt by
writing 1 to it.
Within 0.95 seconds of the Boot ACK Received interrupt, the Boot Data Start interrupt must be
received from the controller. If this does not occur, the software driver must discontinue the boot
process and start with normal discovery.
If internal DMA controller mode is used for the boot process, the controller performs the following
steps after the Boot ACK Received timeout:
• The DMA descriptor is closed.
• The
• The
c. If the Boot Data Start interrupt is received, it indicates that the boot data is being received from the
card device. When the DMA engine is not in internal DMA controller mode, the software driver
can then initiate a data read from the controller based on the
register.
SD/MMC Controller
Send Feedback
field of the
register to 0x200 (512 bytes).
register to multiples of 128K bytes, as indicated by the BOOT_SIZE_MULT value in the
†
field in the
fifoth
†
register to 0xFFFFFFFA.
†
= 1
†
= 1
†
†
= 0
†
= 1
†
= 0
register bits to 0.
cmd
†
11). †
11), the start pattern was not received. The software driver must discontinue the
(step
bit in the register is set to 1, indicating the Boot ACK Received timeout.
ces idsts
bit of the register is not set.
ri idsts
†
bit in the register is set to 1, indicating Boot Data Start timeout.
ces idsts
bit of the register is not set.
ri idsts
†
Alternative Boot Operation for eMMC Card Devices
register equal to the card device total access time, N
tmout
†
register. Typically, the threshold value can be set to 512, which is
†
register with the following fields:
cmd
†
†
†
†
†
†
†
†
†
†
†
expect_boot_ack
expect_boot_ack
set to 0) jump to
expect_boot_ack
expect_boot_ack
†
interrupt bit in the
rxdr rintsts
Altera Corporation
14-81
†
†
.
AC
†
to 1.
†
to 0.
was set to
†