Altera cyclone V Technical Reference page 1010

Hard processor system
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14-64
Reset and Card Device Discovery Overview
Bit
send_auto_stop
transfer_mode
read_write
data_expected
response_length
response_expect
cmd_index
wait_prvdata_complete
check_response_crc
Table 14-30: blksiz Register Settings for ATA Task File Transfer
31:16
15:0 (
block_size
Table 14-31: bytcnt Register Settings for ATA Task File Transfer
31:0
Reset and Card Device Discovery Overview
Before starting any CE-ATA operations, the host must perform a MMC reset and initialization procedure.
The host and card device must negotiate the MMC transfer (MMC TRAN) state before the card enters the
MMC TRAN state.
Altera Corporation
0
0
1 or 0
1
0
1
Command
index
1
1
Bit
0
)
16
Bit
16
Value
Block transfer mode. Block size and byte count must
match number of bytes to read or write
1 for write and 0 for read
Data is expected
Set this parameter to the command number. For
example, set to 24 for SD/SDIO WRITE_BLOCK
(CMD24) or 25 for WRITE_MULTIPLE_BLOCK
(CMD25).
• 0 for send command immediately
• 1 for send command after previous DTO interrupt
• 0 for not checking response CRC
• 1 for checking response CRC
Value
Reserved bits set to 0
For accessing entire task file (16, 8-bit registers). Block
size of 16 bytes
Value
For accessing entire task file (16, 8-bit registers). Byte
count value of 16 is used with the block size set to 16.
Comment
Comment
Comment
SD/MMC Controller
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cv_5v4
2016.10.28

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