Functional Overview; Stack Daughter Cards - Altera Nios Ethernet User Manual

Daughter Card
Functional
Overview
Stack Daughter
Cards
30
The main functional component on the Nios EDK daughter card is a
LAN91C111 integrated PHY/MAC chip. See
main/catalog/lan91c111.html
LAN91C111 presents an ISA-bus interface to the Nios CPU. The necessary
electrical-interface signals are provided on the set of female connectors.
These connectors are compatible with the expansion connector groups on
the Nios development board. The Nios EDK daughter card is compatible
with either the 5-V (JP11, JP12, JP13) or the 3.3-V (JP8, JP9, JP10) expansion
connector groups. The daughter card does not use any 5-V signals.
1
All of the included reference designs use a Nios EDK daughter
card connected to the 3.3-V expansion connector group (JP8, JP9,
and JP10).
1
To use a Nios EDK daughter card connected to the 5-V expansion
connector group, you will need to create a new APEX
configuration with the appropriate pin-assignments.
The Nios EDK daughter card connectors are arranged such that two
daughter cards can be stacked vertically as shown in
stacked daughter cards can be accessed via the shared tri-state data bus.
The Nios EDK includes only one daughter card. The electrical interface
does not support stacks more than two cards deep.
Figure 19. Stacked Daughter Cards
Nios Ethernet Development Kit User Guide
http://www.smsc.com/
for detailed specifications. The
Figure 19. Two
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