Fpga Manager; Features Of The Fpga Manager - Altera Cyclone V Device Handbook

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The FPGA manager in the hard processor system (HPS) manages and monitors the FPGA portion of the

system on a chip (SoC) FPGA device. The FPGA manager can configure the FPGA fabric from the HPS,

monitor the state of the FPGA, and drive or sample signals to or from the FPGA fabric.

The FPGA manager provides the following functionality and features:

• Full configuration and partial reconfiguration of the FPGA portion of the SoC device

• Drives 32 general-purpose output signals to the FPGA fabric

• Receives 32 general-purpose input signals from the FPGA fabric

• Receives two boot handshaking input signals from the FPGA fabric (used when the HPS boots from the

• Monitors the FPGA configuration and power status

• Generates interrupts based on the FPGA status changes

• Can reset the FPGA

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FPGA Manager

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