Altera cyclone V Technical Reference page 1197

16-46
DMASEV
DMASEV
Send Event instructs the DMAC to modify an event-interrupt resource. Depending on how you program
the interrupt enable register, this either:
• Generates event <event_num>
Note: Typically, you use
appropriate event number, to unstall the waiting thread.
• Signals an interrupt using
Figure 16-21: DMASEV Instruction Encoding
Assembler syntax
DMASEV <event_num>
where:
<event_num>
Note: The DMAC aborts the thread if you select an event number that is not available.
Operation
You can use the instruction with the DMA manager thread and the DMA channel thread.
Related Information
• Using Events and Interrupts
• Using an Event to Restart DMA Channels
DMAST[S | B]
Store instructs the DMAC to transfer data from the FIFO buffer to the location that the destination
address registers specifies, using AXI transactions that the DA register and channel control registers
specify. If the
destination address registers after it executes
Figure 16-22: DMAST[S|B] Instruction Encoding
Assembler syntax
DMAST[S|B]
Altera Corporation
to stall a thread and then another thread executes
DMAWFE
irq <event_num>
15 11
event_num[4:0]
5-bit immediate, value 0-31
on page 16-21
bit in the channel control registers is set to incrementing, the DMAC updates the
dst_inc
.
10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 1 1 0
on page 16-22
.
DMAST[S|B]
7 6 5 4 3 2 1 0
0 0 0 0 1 0 bs x
DMASEV
1 0 0
cv_5v4
2016.10.28
, using the
DMA Controller
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