Altera cyclone V Technical Reference page 1398

Hard processor system
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cv_5v4
2016.10.28
Bit
29
mbc_5
28
mbc_4
27
mbc_3
Ethernet Media Access Controller
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Name
This array of bits are mask control bits for comparison
of each of the MAC Address bytes. When masked, the
MAC does not compare the corresponding byte of
received DA or SA with the contents of MAC
Address3 high and low registers. Each bit controls the
masking of the bytes. You can filter a group of
addresses (known as group address filtering)​ by
masking one or more bytes of the address. The array
index corresponds to the byte (e.g. index 0 is for bits
7:0).
Value
0x0
0x1
This array of bits are mask control bits for comparison
of each of the MAC Address bytes. When masked, the
MAC does not compare the corresponding byte of
received DA or SA with the contents of MAC
Address3 high and low registers. Each bit controls the
masking of the bytes. You can filter a group of
addresses (known as group address filtering)​ by
masking one or more bytes of the address. The array
index corresponds to the byte (e.g. index 0 is for bits
7:0).
Value
0x0
0x1
This array of bits are mask control bits for comparison
of each of the MAC Address bytes. When masked, the
MAC does not compare the corresponding byte of
received DA or SA with the contents of MAC
Address3 high and low registers. Each bit controls the
masking of the bytes. You can filter a group of
addresses (known as group address filtering)​ by
masking one or more bytes of the address. The array
index corresponds to the byte (e.g. index 0 is for bits
7:0).
Value
0x0
0x1
Description
Description
Byte is unmasked (i.e. is compared)
Byte is masked (i.e. not compared)
Description
Byte is unmasked (i.e. is compared)
Byte is masked (i.e. not compared)
Description
Byte is unmasked (i.e. is compared)
Byte is masked (i.e. not compared)
17-183
MAC_Address3_High
Access
Reset
RW
0x0
RW
0x0
RW
0x0
Altera Corporation

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