Altera cyclone V Technical Reference page 1100

Hard processor system
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cv_5v4
2016.10.28
Instruction
Lanes Used By
Dual I/O
1
fast read
(DIOFR)
Quad
1
output fast
read
(QOFR)
Quad I/O
1
fast read
(QIOFR)
Dual
2
command
fast read
(DCFR)
Quad
4
command
fast read
(QCFR)
Table 15-3: Quad SPI Configuration for Micron N25Q128 Device (Write Instructions)
Instruction
Page program
Dual input fast
program (DIFP)
Dual input
extended fast
program
(DIEFP)
Quad input fast
program (QIFP)
Quad input
extended fast
program
(QIEFP)
Dual command
fast program
(DCFP)
Quad command
fast program
(QCFP)
Quad SPI Flash Controller
Send Feedback
Lanes Used to
Opcode
Send Address
2
1
4
2
4
Lanes Used
Lanes Used
By Opcode
to Send
Address
1
1
1
1
1
2
1
1
1
4
2
2
4
4
Lanes Used to
instwidth
Send Data
Value
2
0
4
0
4
0
2
1
4
2
Lanes Used
instwidth
to Send Data
Value
1
0
2
0
2
0
4
0
4
0
2
1
4
2
Configuring the Flash Device
addrwidth
datawidth
Value
1
1
0
2
2
2
Don't care
Don't care
Don't care
Don't care
addrwidth
datawidth Value
Value
0
0
0
1
1
1
0
2
2
2
Don't care
Don't care
Don't care
Don't care
Altera Corporation
15-11
Value

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