Altera cyclone V Technical Reference page 1275

17-60
Matched Frames
Matched Frames
The MAC forwards the frames, which match all enabled fields, to the application along with the status. The
MAC gives the matched field status only if one of the following conditions is true:
• All enabled Layer 3 and Layer 4 fields match.
• At least one of the enabled field matches and other fields are bypassed or disabled.
Using the CSR set, you can define up to four filters, identified as filter 0 through filter 3. When multiple
Layer 3 and Layer 4 filters are enabled, any filter match is considered as a match. If more than one filter
matches, the MAC provides status of the lowest filter with filter 0 being the lowest and filter 3 being the
highest. For example, if filter 0 and filter 1 match, the MAC gives the status corresponding to filter 0.
Unmatched Frames
The MAC drops the frames that do not match any of the enabled fields. You can use the inverse match
feature to block or drop a frame with specific TCP or UDP over IP fields and forward all other frames. You
can configure the EMAC so that when a frame is dropped, it receives a partial frame with appropriate
abort status or drops it completely.
NonTCP or UDP IP Frames
By default, all non-TCP or UDP IP frames are bypassed from the Layer 3 and Layer 4 filters. You can
optionally program the MAC to drop all non-TCP or UDP over IP frames.
Layer 3 and Layer 4 Filters Register Set
The MAC implements a set of registers for Layer 3 and Layer 4 based frame filtering. In this register set,
there is a control register for frame filtering and five address registers.
You can configure the MAC to have up to four such independent set of registers.
The registers available for programming are as follows:
•
L3_L4_Control0
•
Layer4_Address0
•
Layer3_Address0_Reg0
•
Layer3_Address1_Reg0
•
Layer3_Address2_Reg0
•
Layer3_Address3_Reg0
Related Information
Ethernet MAC Address Map and Register Definitions
Layer 3 Filtering
The EMAC supports perfect matching or inverse matching for the IP Source Address and Destination
Address. In addition, you can match the complete IP address or mask the lower bits.
For IPv6 frames filtering, you can enable the last four data registers of a register set to contain the 128-bit
IP Source Address or IP Destination Address. The IP Source or Destination Address should be
programmed in the order defined in the IPv6 specification. The specification requires that you program
the first byte of the received frame IP Source or Destination Address in the higher byte of the register.
Subsequent registers should follow the same order.
For IPv4 frames filtering, you can enable the second and third data registers of a register set to contain the
32-bit IP Source Address and IP Destination Address. The remaining two data registers are reserved. The
Altera Corporation
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through
L3_L4_Control3
through
Layer4_Address3
through
Layer3_Address0_Reg3
through
Layer3_Address1_Reg3
through
Layer3_Address2_Reg3
through
Layer3_Address3_Reg3
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registers: Layer and Layer 4 Control registers
registers: Layer 4 Address registers
registers: Layer 3 Address 0 registers
registers: Layer 3 Address 1 registers
registers: Layer 3 Address 2 registers
registers: Layer 3 Address 3 registers
on page 17-72
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Ethernet Media Access Controller
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2016.10.28
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