Altera cyclone V Technical Reference page 1207

16-56
Unaligned Source Address to Aligned Destination Address
Figure 16-31: Aligned to Unaligned Program
The first
DMALD
DMAC shifts them by four bytes and therefore uses five entries in the MFIFO buffer.
Each
DMAST
of the program, until it is emptied by the last
This example has a static requirement of one MFIFO buffer entry and a dynamic requirement of four
MFIFO buffer entries.
Unaligned Source Address to Aligned Destination Address
In this program, the source address is unaligned with the AXI data bus width but the destination address
is aligned. The source address is not aligned to the source burst size so the first
less data than the
DMAMOV CCR, SB4 SS64 DB4 DS64
DMAMOV SAR, 0x1004
DMAMOV DAR, 0x4000
DMALD ; shown as a in the figure below
DMALP 15
DMALD ; shown as b1, ... b, bn in the figure below
DMAST ; shown as c in the figure below
DMALPEND
DMAMOV CCR, SB1 SS32 DB4 DS64
DMALD ; shown as d in the figure below
DMAST ; shown as e in the figure below
DMAEND
Altera Corporation
instruction loads four doublewords but because the destination address is unaligned, the
requires only four entries of data, and therefore the extra entry remains in use for the duration
a a a
1
5
1
b b b
0
. Therefore, an extra
DMAST
.
DMAST
Data from
DMALD
a
n
Data for
first DMAST
b
c
Data for
15x DMAST
Data for
last DMAST
is required to satisfy the first
DMALD
DMALD
7 0
a a a a
1 1 1 1
a a a a a a a a
1 1 1 1 1 1 1 1
a a a a a a a a
1 1 1 1 1 1 1 1
a a a a a a a a
1 1 1 1 1 1 1 1
a a a a a a a a
1 1 1 1
a a a a a a a a
a a a a a a a a
a a a a a a a a
a a a a
n n n n
DMAST
instruction reads in
DMALD
.
DMAST
cv_5v4
2016.10.28
DMA Controller
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