Altera cyclone V Technical Reference page 1165

16-14
Peripheral Request Interface Mapping
Peripheral
FPGA 2
FPGA 3
FPGA 4 /CAN 0 interface 1
FPGA 5 /CAN 0 interface 2
FPGA 6 /CAN 1 interface 1
FPGA 7 /CAN 1 interface 2
2
I C 0 Tx
2
I C 0 Rx
2
I C 1 Tx
2
I C 1 Rx
2
I C 2 Tx (EMAC)
2
I C 2 Rx (EMAC)
2
I C 3 Tx (EMAC)
2
I C 3 Rx (EMAC)
SPI Master 0 Tx
SPI Master 0 Rx
SPI Slave 0 Tx
SPI Slave 0 Rx
SPI Master 1 Tx
SPI Master 1 Rx
SPI Slave 1 Tx
SPI Slave 1 Rx
Quad SPI Flash Tx
Altera Corporation
Request Interface
ID
2 Synopsys
3 Synopsys
4 Synopsys (FPGA) / Bosch (CAN)
5 Synopsys (FPGA) / Bosch (CAN)
6 Synopsys (FPGA) / Bosch (CAN)
7 Synopsys (FPGA) / Bosch (CAN)
8 Synopsys
9 Synopsys
10 Synopsys
11 Synopsys
12 Synopsys
13 Synopsys
14 Synopsys
15 Synopsys
16 Synopsys
17 Synopsys
18 Synopsys
19 Synopsys
20 Synopsys
21 Synopsys
22 Synopsys
23 Synopsys
24 ARM
Protocol
DMA Controller
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cv_5v4
2016.10.28