Interface Signals - Altera cyclone V Technical Reference

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cv_5v4
2016.10.28
• Software triggered instruction generator (STIG)—generates flash commands through the flash
command register (
• Flash command generator—generates flash command and address instructions based on instructions
from the direct and indirect access controllers or the STIG
• DMA peripheral request controller—issues requests to the DMA peripheral request interface to
communicate with the external DMA controller
• SPI PHY—serially transfers data and commands to the external SPI flash devices

Interface Signals

The quad SPI controller provides four chip select outputs to allow control of up to four external quad SPI
flash devices. The outputs serve different purposes depending on whether the device is used in single, dual,
or quad operation mode. The following table lists the I/O pin use of the quad SPI controller interface
signals for each operation mode.
Table 15-1: Interface Signals
Signal
Single
data[0]
Dual or quad
Single
data[1]
Dual or quad
Single or dual
data[2]
Quad
Single, dual, or quad
data[3]
ss_n[0]
ss_n[1]
Single, dual, or quad
ss_n[2]
ss_n[3]
Single, dual, or quad
sclk
Functional Description of the Quad SPI Flash Controller
Overview
The quad SPI flash controller uses the register slave interface to select the operation modes and configure
the data slave interface for data transfers. The quad SPI flash controller uses the data slave interface for
direct and indirect accesses, and the register slave interface for software triggered instruction generator
(STIG) operation and SPI legacy mode accesses.
Accesses to the data slave are forwarded to the direct or indirect access controller. If the access address is
within the configured indirect address range, the access is sent to the indirect access controller.
Quad SPI Flash Controller
Send Feedback
) and provides low-level access to flash memory
flashcmd
Mode
Output
Bidirectional
Input
Bidirectional
Output
Bidirectional
Bidirectional
Output
Output
Direction
Data output 0
Data I/O 0
Data input 0
Data I/O 1
Active low write protect
Data I/O 2
Data I/O 3
Active low slave select 0
Active low slave select 1
Active low slave select 2
Active low slave select 3
Serial Clock
15-3
Interface Signals
Function
Altera Corporation

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